Automatic generation of high-speed accurate TLM models for out-of-order pipelined bus

  • Authors:
  • Chen-Kang Lo;Mao-Lin Li;Li-Chun Chen;Yi-Shan Lu;Ren-Song Tsay;Hsu-Yao Huang;Jen-Chieh Yeh

  • Affiliations:
  • National Tsing Hua University, HsinChu, Taiwan;National Tsing Hua University, HsinChu, Taiwan;National Tsing Hua University, HsinChu, Taiwan;National Tsing Hua University, HsinChu, Taiwan;National Tsing Hua University, HsinChu, Taiwan;Industrial Technology Research Institute, HsinChu, Taiwan;Industrial Technology Research Institute, HsinChu, Taiwan

  • Venue:
  • ACM Transactions on Embedded Computing Systems (TECS) - Special Section on ESTIMedia'10
  • Year:
  • 2013

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Abstract

Although pipelined/out-of-order (PL/OO) execution features are commonly supported by the state-of-the-art bus designs, no existing manual Transaction-Level-Modeling (TLM) approaches can effectively construct fast and accurate simulation models for PL/OO buses. Mainly, the inherent high design complexity of concurrent PL/OO behaviors makes the manual approaches tedious and error-prone. To tackle the complicated modeling task, this article presents an automatic approach that performs systematic abstraction and generation of fast-and-accurate simulation models. The experimental results show that our approach reduces 21 times modeling efforts, while our generated models perform simulation an order of magnitude faster than Cycle-Accurate models with the same PL/OO transaction execution cycle counts preserved.