Accurate interconnect modeling: towards multi-million transistor chips as microwave circuits

Authors:
N. P. van der Meijs;T. Smedes
Affiliations:
Delft University of Technology, Mekelweg 4, 2628 CD Delft, the Netherlands;Philips Semiconductors, Gerstweg 2, 6534 AE Nijmegen, the Netherlands
Venue:
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Year:
1997

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Abstract

In this tutorial we discuss concepts and techniques for the accurate and efficient modeling and extraction of interconnect parasitics in VLSI designs. Due to increasing operating frequencies, microwave-like effects will become important. Therefore stronger demands are put on extraction and verification tools. We indicate the state-of-the-art for capacitance, resistance and substrate resistance extraction and discuss some open problems. We also discuss several model reduction techniques as well as issues related to simulation and implementation in a CAD system.