The DUAL-EVAL Hardware Description Language and Its Use in the Formal Specification and Verification of the FM9001 Microprocessor

Authors:
Bishop C. Brock;Warren A. Hunt, Jr.
Affiliations:
Computational Logic, Inc. 1717 West Sixth Steet, Suite 290 Austin, TX 78703-4776 U.S.A./ Tel: +1 512 322 9951, FAX: +1 512 322 0656, E-mail: brock@cli.com, hunt@cli.com;Computational Logic, Inc. 1717 West Sixth Steet, Suite 290 Austin, TX 78703-4776 U.S.A./ Tel: +1 512 322 9951, FAX: +1 512 322 0656, E-mail: brock@cli.com, hunt@cli.com
Venue:
Formal Methods in System Design
Year:
1997

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Abstract

We present the full formal semantics of the DUAL-EVAL hardwaredescription language. DUAL-EVAL is a hierarchical,occurrence-oriented simulator for synchronous Mealy machines. Webriefly describe the FM9001 microprocessor, whose design has beenformally specified with the DUAL-EVAL language and mechanicallyproved correct with respect to a behavioral specification. The FM9001has been fabricated as a CMOS ASIC and tested extensively.