Retargetable estimation scheme for DSP architecture selection

Authors:
Naji Ghazal;Richard Newton;Jan Rabaey
Affiliations:
Department of Electrical Engineering and Computer Sciences, University of California, Berkeley, CA;Department of Electrical Engineering and Computer Sciences, University of California, Berkeley, CA;Department of Electrical Engineering and Computer Sciences, University of California, Berkeley, CA
Venue:
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Year:
2000

Performance evaluation for application-specific architectures

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
ISDL: an instruction set description language for retargetability

DAC '97 Proceedings of the 34th annual Design Automation Conference
Instruction selection, resource allocation, and scheduling in the AVIV retargetable code generator

DAC '98 Proceedings of the 35th annual Design Automation Conference
Describing instruction set processors using nML

EDTC '95 Proceedings of the 1995 European conference on Design and Test
DSP processor/compiler co-design: a quantitative approach

ISSS '96 Proceedings of the 9th international symposium on System synthesis
Code optimization libraries for retargetable compilation for embedded digital signal processors

Code optimization libraries for retargetable compilation for embedded digital signal processors

Predicting performance potential of modern DSPs

Proceedings of the 37th Annual Design Automation Conference
Evaluating register file size in ASIP design

Proceedings of the ninth international symposium on Hardware/software codesign
An efficient technique for exploring register file size in ASIP synthesis

CASES '02 Proceedings of the 2002 international conference on Compilers, architecture, and synthesis for embedded systems
Fast processor core selection for WLAN modem using mappability estimation

Proceedings of the tenth international symposium on Hardware/software codesign
Modern development methods and tools for embedded reconfigurable systems: A survey

Integration, the VLSI Journal

Hi-index	0.00