ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
Energy efficient data transfer and storage organization for a MAP turbo decoder module
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
VLSI architectures for turbo codes
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Iterative decoding of binary block and convolutional codes
IEEE Transactions on Information Theory
A low-power VLSI architecture for turbo decoding
Proceedings of the 2003 international symposium on Low power electronics and design
VLSI architectures for SISO-APP decoders
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Energy Efficient VLSI Architecture for Linear Turbo Equalizer
Journal of VLSI Signal Processing Systems
Design and implementation of low-energy turbo decoders
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Architecture-driven voltage scaling for high-throughput turbo-decoders
Journal of Embedded Computing - Low-power Embedded Systems
Traceback-Based Optimizations for Maximum a Posteriori Decoding Algorithms
Journal of Signal Processing Systems
Area-efficient high-throughput MAP decoder architectures
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Implementation of a High Throughput 3GPP Turbo Decoder on GPU
Journal of Signal Processing Systems
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