The ESTEREL synchronous programming language: design, semantics, implementation
Science of Computer Programming
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DAC '93 Proceedings of the 30th international Design Automation Conference
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ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
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ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
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Hardware-software co-design of embedded systems: the POLIS approach
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Proceedings of the 36th annual ACM/IEEE Design Automation Conference
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DATE '00 Proceedings of the conference on Design, automation and test in Europe
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CASES '00 Proceedings of the 2000 international conference on Compilers, architecture, and synthesis for embedded systems
Logic optimization and code generation for embedded control applications
Proceedings of the ninth international symposium on Hardware/software codesign
Event driven simulation without loops or conditionals
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Don't cares and multi-valued logic network minimization
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Proceedings of the tenth international symposium on Hardware/software codesign
Synthesis of software programs for embedded control applications
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Generalized cofactoring for logic function evaluation
Proceedings of the 40th annual Design Automation Conference
SystemC
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Proceedings of the 2004 Asia and South Pacific Design Automation Conference
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ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
IEEE Transactions on Computers
HW/SW co-design for Esterel processing
CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Minimization of Haar wavelet series and Haar spectral decision diagrams for discrete functions
Computers and Electrical Engineering
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This paper addresses the problem of automatic generation of implementation software from high-level functional specifications in the context of embedded system on chip designs. Software design complexity for embedded systems has increased so much that a high-level functional programming paradigm need to be adopted for formal verifiability, maintainability and short time-to-market. We propose a framework for efficiently generating implementation software from a synchronous state machine specification for embedded control systems. The framework is generic enough to allow hardware/software partition for a given architecture platform. It is demonstrated that the logic optimization and simulation techniques can be combined to produce fast execution code for such embedded systems. Specifically, we propose a framework for software synthesis from multi-valued logic, including fast evaluation of logic functions, and scheduling techniques for node execution. Experiments are performed to show the initial results of our algorithms in this framework.