Economics of design and test for electronic circuits and systems
Economics of design and test for electronic circuits and systems
A case study on the implementation of the Illinois Scan Architecture
Proceedings of the IEEE International Test Conference 2001
A new methodology for improved tester utilization
Proceedings of the IEEE International Test Conference 2001
Tackling test trade-offs from design, manufacturing to market using economic modeling
Proceedings of the IEEE International Test Conference 2001
Enhanced reduced pin-count test for full-scan design
Proceedings of the IEEE International Test Conference 2001
OPMISR: the foundation for compressed ATPG vectors
Proceedings of the IEEE International Test Conference 2001
Application of Deterministic Logic BIST on Industrial Circuits
ITC '00 Proceedings of the 2000 IEEE International Test Conference
Frequency-Directed Run-Length (FDR) Codes with Application to System-on-a-Chip Test Data Compression
VTS '01 Proceedings of the 19th IEEE VLSI Test Symposium
Test Economics for Multi-site Test with Modern Cost Reduction Techniques
VTS '02 Proceedings of the 20th IEEE VLSI Test Symposium
Applications of Semiconductor Test Economics, and Multisite Testing to Lower Cost of Test
ITC '99 Proceedings of the 1999 IEEE International Test Conference
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This paper will propose an overall portfolio of different modern test techniques, like reduced pin-count test, SoC multi-site test, low channel cost ATE, test vector compression, bandwidth matching, and advanced probing technologies, to lower the cost of test. The overall economic benefits, the potential synergies, the overall tradeoffs, and the scalability of the benefits of these techniques, are complex to understand and currently not well understood. This problem will be analyzed in this paper by using technical cost modeling. The dependency of the benefits on different applications will be analyzed by modeling the test cost for four different applications. It will be shown that the right match between the application and a combination of the described techniques can result in a significant reduction of the cost of test. Moreover, it will be shown that this optimal match evolves during technology progress and can enable a scalable reduction of the cost of test.