A decision procedure for bit-vector arithmetic
DAC '98 Proceedings of the 35th annual Design Automation Conference
Formal verification of word-level specifications
DATE '99 Proceedings of the conference on Design, automation and test in Europe
FMCAD '98 Proceedings of the Second International Conference on Formal Methods in Computer-Aided Design
BooStER: Speeding Up RTL Property Checking of Digital Designs by Word-Level Abstarction
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
RTL-Datapath Verification using Integer Linear Programming
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Efficient Dynamic Minimization of Word-Level DDs Based on Lower Bound Computation
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
Systematic Formal Verification of Interpreters
ICFEM '97 Proceedings of the 1st International Conference on Formal Engineering Methods
Using Word-Level Information in Formal Hardware Verification
Automation and Remote Control
Exploiting Vanishing Polynomials for Equivalence Veri.cation of Fixed-Size Arithmetic Datapaths
ICCD '05 Proceedings of the 2005 International Conference on Computer Design
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Equivalence verification of arithmetic datapaths with multiple word-length operands
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Formal verification at higher levels of abstraction
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Verification of arithmetic datapaths using polynomial function models and congruence solving
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
A scalable decision procedure for fixed-width bit-vectors
Proceedings of the 2009 International Conference on Computer-Aided Design
Encoding RTL Constructs for MathSAT: a Preliminary Report
Electronic Notes in Theoretical Computer Science (ENTCS)
Deciding bit-vector arithmetic with abstraction
TACAS'07 Proceedings of the 13th international conference on Tools and algorithms for the construction and analysis of systems
A lazy and layered SMT(BV) solver for hard industrial verification problems
CAV'07 Proceedings of the 19th international conference on Computer aided verification
On theorem proving for program checking: historical perspective and recent developments
Proceedings of the 12th international ACM SIGPLAN symposium on Principles and practice of declarative programming
Building efficient decision procedures on top of SAT solvers
SFM'06 Proceedings of the 6th international conference on Formal Methods for the Design of Computer, Communication, and Software Systems
Bounded model checking of software using SMT solvers instead of SAT solvers
SPIN'06 Proceedings of the 13th international conference on Model Checking Software
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