On Removing Redundancies from Synchronous Sequential Circuits with Synchronizing Sequences
IEEE Transactions on Computers
Identifying sequential redundancies without search
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Abstraction Techniques for Validation Coverage Analysis and Test Generation
IEEE Transactions on Computers
Synthesis for Testability of Highly Complex Controllers by Functional Redundancy Removal
IEEE Transactions on Computers
Simulation-Based Engineering for Industrial Competitive Advantage
IEEE Design & Test
VERIFUL: VERIfication using FUnctional Learning
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Surprises in Sequential Redundancy Identification
EDTC '96 Proceedings of the 1996 European conference on Design and Test
Efficient variable ordering and partial representation algorithm
VLSID '95 Proceedings of the 8th International Conference on VLSI Design
8.3 On Removing Redundant Faults in Synchronous Sequential Circuits
VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium
ITC'94 Proceedings of the 1994 international conference on Test
On achieving complete testability of synchronous sequential circuits with synchronizing sequences
ITC'94 Proceedings of the 1994 international conference on Test
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