Statecharts: A visual formalism for complex systems
Science of Computer Programming
A Partial Scan Method for Sequential Circuits with Feedback
IEEE Transactions on Computers
Verification of synchronous sequential machines based on symbolic execution
Proceedings of the international workshop on Automatic verification methods for finite state systems
Efficient implementation of a BDD package
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
On removing redundancy in sequential circuits
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Automatic functional test generation using the extended finite state machine model
DAC '93 Proceedings of the 30th international Design Automation Conference
Logic synthesis
Logic optimization by an improved sequential redundancy addition and removal techniques
ASP-DAC '95 Proceedings of the 1995 Asia and South Pacific Design Automation Conference
Sequential redundancy identification using recursive learning
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Functional design for testability of control-dominated architectures
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A complete testing strategy based on interacting and hierarchical FSMs
Integration, the VLSI Journal
Synthesis and Optimization of Digital Circuits
Synthesis and Optimization of Digital Circuits
Classification of Faults in Synchronous Sequential Circuits
IEEE Transactions on Computers
Synthesis for testability of large complexity controllers
ICCD '95 Proceedings of the 1995 International Conference on Computer Design: VLSI in Computers and Processors
Fast Sequential ATPG Based on Implicit State Enumeration
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
Sequential Redundancy Identification Using Verification Techniques
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
CHEETA: Composition of Hierarchical Sequential Tests Using ATKET
Proceedings of the IEEE International Test Conference on Designing, Testing, and Diagnostics - Join Them
Proceedings of the IEEE International Test Conference on TEST: The Next 25 Years
On Achieving Complete Testability of Synchronous Sequential Circuits with Synchronizing Sequences
Proceedings of the IEEE International Test Conference on TEST: The Next 25 Years
HITEC: a test generation package for sequential circuits
EURO-DAC '91 Proceedings of the conference on European design automation
Combinational and sequential logic optimization by redundancy addition and removal
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Combinational ATPG theorems for identifying untestable faults in sequential circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A Hierarchical Test Generation Approach for Large Controllers
IEEE Transactions on Computers
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This paper presents a testable synthesis methodology applicable to any top-down design method based on hardware-description-language descriptions, or graphical representations. The methodology is targeted on control-dominated applications and it is based on the identification and removal of a new class of redundant faults, called functionally redundant faults. The formal relation between functionally redundant faults and sequentially redundant faults is introduced. Moreover, the relation between functionally redundant faults and logic synthesis algorithms based on local don't cares is shown. Functionally redundant faults are identified and removed by comparing the implemented synchronous sequential circuit, which can be technology dependent, to its specification. The specification can be a single finite state machine (FSM), a set of interacting FSMs, or a hierarchical FSM that allows the description of highly complex controllers. The proposed methodology produces testable circuits, with area reduction, still mapped on the same technology library, and it manages circuits which cannot be handled by other methods presented in the literature.