Test generation for scan design circuits with tri-state modules and bidirectional terminals

  • Authors:
  • Takuji Ogihara;Shinichi Murai;Yuzo Takamatsu;Kozo Kinoshita;Hideo Fujiwara

  • Affiliations:
  • Mitsubishi Electric Corp. , Kamakura, Kanagawa 247, JAPAN;Mitsubishi Electric Corp. , Kamakura, Kanagawa 247, JAPAN;Saga Universitg, Saga 840, JAPAN;Hiroshima University, Hiroshima 730, JAPAN;Osaka University, Suita, Osaka 565, JAPAN

  • Venue:
  • DAC '83 Proceedings of the 20th Design Automation Conference
  • Year:
  • 1983

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Abstract

This paper describes a program which generates test patterns for scan design circuits with tri-state modules and bidirectional terminals. The test generation procedure uses a path sensitization technique with 14 signal values. The principal features of this program are test generation with automatic decision of I/O mode of bidirectional terminals, generation of test sets for high impedance state, and generation of test sets for system clock control circuits of shift register latches(SRLs) by using shift-in function of SRLs.