Surviving the SOC revolution: a guide to platform-based design
Surviving the SOC revolution: a guide to platform-based design
Smart Memories: a modular reconfigurable architecture
Proceedings of the 27th annual international symposium on Computer architecture
A generic architecture for on-chip packet-switched interconnections
DATE '00 Proceedings of the conference on Design, automation and test in Europe
A Framework for Computer Performance Evaluation Using Benchmark Sets
IEEE Transactions on Computers
Route packets, not wires: on-chip inteconnection networks
Proceedings of the 38th annual Design Automation Conference
Platform-Based Design and Software Design Methodology for Embedded Systems
IEEE Design & Test
Fast processor core selection for WLAN modem using mappability estimation
Proceedings of the tenth international symposium on Hardware/software codesign
Configurable Memory Organisation for Communication Applications
DSD '02 Proceedings of the Euromicro Symposium on Digital Systems Design
Processor Evaluation in an Embedded Systems Design Environment
VLSID '00 Proceedings of the 13th International Conference on VLSI Design
A Network on Chip Architecture and Design Methodology
ISVLSI '02 Proceedings of the IEEE Computer Society Annual Symposium on VLSI
System-level design: orthogonalization of concerns and platform-based design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Proceedings of the 6th FPGAworld Conference
A NoC system generator for the Sea-of-Cores era
Proceedings of the 8th FPGAWorld Conference
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Exploitation of silicon capacity will requireimprovements in design productivity and more scalablesystem paradigms. Asynchronous message passingnetworks on chip (NOC) have been proposed asbackbones for billion-transistor ASICs. We present anovel layered backbone-platform-system (BPS) designmethodology for development of network-on-chip basedproducts. It combines and extends the distributed,parallel, embedded and platform-based design conceptsin order to manage the diversity and complexity of NOC-basedsystems. The reuse of communication principles invarious platforms, the reuse of platforms in productdifferentiation, and system-level decision-supportmethods are the cornerstones of our methodology. Thepresented mappability estimation and workloadsimulations demonstrate the feasibility of such methods.