The good, the bad, and the ugly of silicon debug
Proceedings of the 43rd annual Design Automation Conference
Interactive presentation: Low cost debug architecture using lossy compression for silicon debug
Proceedings of the conference on Design, automation and test in Europe
Automating post-silicon debugging and repair
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Proceedings of the conference on Design, automation and test in Europe
Algorithms for state restoration and trace-signal selection for data acquisition in silicon debug
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Trace signal selection for visibility enhancement in post-silicon validation
Proceedings of the Conference on Design, Automation and Test in Europe
Pruning-based trace signal selection algorithm
Proceedings of the 16th Asia and South Pacific Design Automation Conference
Embedded debug architecture for bypassing blocking bugs during post-silicon validation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Test Vector Generation for Post-Silicon Delay Testing Using SAT-Based Decision Problems
Journal of Electronic Testing: Theory and Applications
Accelerating microprocessor silicon validation by exposing ISA diversity
Proceedings of the 44th Annual IEEE/ACM International Symposium on Microarchitecture
Machine learning-based anomaly detection for post-silicon bug diagnosis
Proceedings of the Conference on Design, Automation and Test in Europe
Deconfigurable microprocessor architectures for silicon debug acceleration
Proceedings of the 40th Annual International Symposium on Computer Architecture
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This paper describes the sometimes exhilarating, sometimes depressing, and always challenging job of bleeding-edge microprocessor debug. It covers an overview of processor debug, the flows, tools and methods used to perform debug, the process of "root causing" and fixing bugs, and includes case studies of actual bugs from recent processors. In conclusion, some of the future challenges for microprocessor testing are presented.