Shmoo Plotting: The Black Art of IC Testing
IEEE Design & Test
Diagnosis and characterization of timing-related defects by time-dependent light emission
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Novel optical probing technique for flip chip packaged microprocessors
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Debug methodology for the McKinley processor
Proceedings of the IEEE International Test Conference 2001
Silicon Symptoms to Solutions: Applying Design for Debug Techniques
ITC '02 Proceedings of the 2002 IEEE International Test Conference
The Manic Depression of Microprocessor Debug
ITC '02 Proceedings of the 2002 IEEE International Test Conference
ITC '99 Proceedings of the 1999 IEEE International Test Conference
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Picosecond imaging circuit analysis
IBM Journal of Research and Development
Automating post-silicon debugging and repair
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Reap what you sow: spare cells for post-silicon metal fix
Proceedings of the 2008 international symposium on Physical design
SafeResynth: A new technique for physical synthesis
Integration, the VLSI Journal
IFRA: instruction footprint recording and analysis for post-silicon bug localization in processors
Proceedings of the 45th annual Design Automation Conference
Online cache state dumping for processor debug
Proceedings of the 46th Annual Design Automation Conference
Spare-cell-aware multilevel analytical placement
Proceedings of the 46th Annual Design Automation Conference
Post-silicon bug localization for processors using IFRA
Communications of the ACM
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
LReplay: a pending period based deterministic replay scheme
Proceedings of the 37th annual international symposium on Computer architecture
Post-silicon validation opportunities, challenges and recent advances
Proceedings of the 47th Design Automation Conference
BLoG: post-silicon bug localization in processors using bug localization graphs
Proceedings of the 47th Design Automation Conference
Representative path selection for post-silicon timing prediction under variability
Proceedings of the 47th Design Automation Conference
Accelerating microprocessor silicon validation by exposing ISA diversity
Proceedings of the 44th Annual IEEE/ACM International Symposium on Microarchitecture
Post-silicon fault localisation using maximum satisfiability and backbones
Proceedings of the International Conference on Formal Methods in Computer-Aided Design
Quick detection of difficult bugs for effective post-silicon validation
Proceedings of the 49th Annual Design Automation Conference
Deterministic Replay Using Global Clock
ACM Transactions on Architecture and Code Optimization (TACO)
Overcoming post-silicon validation challenges through quick error detection (QED)
Proceedings of the Conference on Design, Automation and Test in Europe
Deconfigurable microprocessor architectures for silicon debug acceleration
Proceedings of the 40th Annual International Symposium on Computer Architecture
AC-plus scan methodology for small delay testing and characterization
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Silicon debug begins with the arrival of design prototypes and can continue well after a product has gone into production. It is perhaps the most exciting and challenging stage of the integrated circuit development process. This paper gives an overview of silicon debug, and describes tools and methods used during the debug process.