A deterministic approach to adjacency testing for delay faults

Authors:
C. T. Glover;M. R. Mercer
Affiliations:
Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, Texas;Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, Texas
Venue:
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Year:
1989

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Abstract

Adjacency testing for delay faults is examined in both theory and implementation. We shall show that the necessary and sufficient conditions for adjacency testability yield an efficient method of robust delay test generation. Empirical results (including several different cost measurements) are presented which demonstrate that our technique: (1) achieves high fault coverages under both the robust and nonrobust delay fault models and (2) is cost effective.