A deterministic approach to adjacency testing for delay faults
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Parallel pattern fault simulation of path delay faults
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
A simplified six-waveform type method for delay fault testing
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
At-speed delay testing of synchronous sequential circuits
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
On the over-specification problem in sequential ATPG algorithms
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Delay fault models and test generation for random logic sequential circuits
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Delay fault test generation for scan/hold circuits using Boolean expressions
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
A method of delay fault test generation
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Generating Tests for Delay Faults in Nonscan Circuits
IEEE Design & Test
A Partial Enhanced-Scan Approach to Robust Delay-Fault Test Generation for Sequential Circuits
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
On Multiple Path Propagating Tests for Path Delay Faults
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
Design for Testability: Using Scanpath Techniques for Path-Delay Test and Measurement
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
Skewed-Load Transition Test: Part 1, Calculus
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
Amdahl Corporation Board Delay Test System
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
AC Test Quality: Beyond Transition Fault Coverage
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
Delay Test: The Next Frontier for LSSD Test Systems
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
Skewed-Load Transition Test: Part 2, Coverage
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
Robustness Enhancement and Detection Threshold Reduction in ATPG for Gate Delay Faults
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
Delay Testing Using a Matrix of Accessible Storage
Proceedings of the IEEE International Test Conference on Designing, Testing, and Diagnostics - Join Them
On the Acceleration of Test Generation Algorithms
IEEE Transactions on Computers
On Achieving Complete Coverage of Delay Faults in Full Scan Circuits using Locally Available Lines
ITC '99 Proceedings of the 1999 IEEE International Test Conference
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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This paper discusses delay fault test generation methodologies that avoid the area and performance overhead of enhanced scan elements by the use of scan and functional justification techniques. Issues with the use of scan justification and functional justification in a standard edge-triggered single clock scan environment are discussed. A functional justification based path delay test generator for circuits designed using standard scan elements is described. This test generator uses a calculus that allows circuits containing internal tri-state elements and bi-directional ports to be supported. Clock suppression techniques are employed to minimize state justification requirements.