At-speed delay testing of synchronous sequential circuits

SPADES: a simulator for path delay faults in sequential circuits

EURO-DAC '92 Proceedings of the conference on European design automation

A Simulator for At-Speed Robust Testing of Path Delay Faults in Combinational Circuits

IEEE Transactions on Computers

A Scan-BIST Structure to Test Delay Faults in Sequential Circuits

Journal of Electronic Testing: Theory and Applications - Special issue on the IEEE European Test Workshop

Delay test of chip I/Os using LSSD boundary scan

ITC '98 Proceedings of the 1998 IEEE International Test Conference

Sequential logic path delay test generation by symbolic analysis

ATS '95 Proceedings of the 4th Asian Test Symposium

A trace-based method for delay fault diagnosis in synchronous sequential circuits

EDTC '95 Proceedings of the 1995 European conference on Design and Test

DFSIM: A Gate-Delay Fault Simulator for Sequential Circuits

EDTC '96 Proceedings of the 1996 European conference on Design and Test

Flags and Algebra for Sequential Circuit VNR Path Delay Fault Test Generation

VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications

Testing High Speed VLSI Devices Using Slower Testers

VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium

Implicit and Exact Path Delay Fault Grading in Sequential Circuits

Proceedings of the conference on Design, Automation and Test in Europe - Volume 2

Test compaction for transition faults under transparent-scan

Proceedings of the conference on Design, automation and test in Europe: Proceedings

A delay fault model for at-speed fault simulation and test generation

Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design

Self-Measurement of Combinatorial Circuit Delays in FPGAs

ACM Transactions on Reconfigurable Technology and Systems (TRETS)

On path delay testing in a standard scan environment

ITC'94 Proceedings of the 1994 international conference on Test

Scan Flip-Flop Grouping to Compress Test Data and Compact Test Responses for Launch-on-Capture Delay Testing

ACM Transactions on Design Automation of Electronic Systems (TODAES)

Built-in generation of multicycle functional broadside tests with observation points

ACM Transactions on Design Automation of Electronic Systems (TODAES)