ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
Processor Control Flow Monitoring Using Signatured Instruction Streams
IEEE Transactions on Computers
Control-Flow Checking Using Watchdog Assists and Extended-Precision Checksums
IEEE Transactions on Computers
An Optimal Graph-Construction Approach to Placing Program Signatures for Signature Monitoring
IEEE Transactions on Computers
Compiler-Assisted Multiple Instruction Word Retry for VLIW Architectures
IEEE Transactions on Parallel and Distributed Systems
Hierarchical Error Detection in a Software Implemented Fault Tolerance (SIFT) Environment
IEEE Transactions on Knowledge and Data Engineering
Concurrent Detection of Processor Control Errors by Hybrid Signature Monitoring
EDCC-3 Proceedings of the Third European Dependable Computing Conference on Dependable Computing
A Watchdog Processor Architecture with Minimal Performance Overhead
SAFECOMP '02 Proceedings of the 21st International Conference on Computer Safety, Reliability and Security
Error Detection Enhancement in COTS Superscalar Processors with Performance Monitoring Features
Journal of Electronic Testing: Theory and Applications
SWIFT: Software Implemented Fault Tolerance
Proceedings of the international symposium on Code generation and optimization
Design and Evaluation of Hybrid Fault-Detection Systems
Proceedings of the 32nd annual international symposium on Computer Architecture
Concurrent Detection of Control Flow Errors by Hybrid Signature Monitoring
IEEE Transactions on Computers
A New Hybrid Fault Detection Technique for Systems-on-a-Chip
IEEE Transactions on Computers
Software-controlled fault tolerance
ACM Transactions on Architecture and Code Optimization (TACO)
Static typing for a faulty lambda calculus
Proceedings of the eleventh ACM SIGPLAN international conference on Functional programming
Hardware assisted pre-emptive control flow checking for embedded processors to improve reliability
CODES+ISSS '06 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis
Fault-tolerant typed assembly language
Proceedings of the 2007 ACM SIGPLAN conference on Programming language design and implementation
Hardware and Software Transparency in the Protection of Programs Against SEUs and SETs
Journal of Electronic Testing: Theory and Applications
Increasing software reliability using a signature method
Information Sciences: an International Journal
Remote entrusting by run-time software authentication
SOFSEM'08 Proceedings of the 34th conference on Current trends in theory and practice of computer science
A hybrid hardware--software technique to improve reliability in embedded processors
ACM Transactions on Embedded Computing Systems (TECS)
Automated application of fault tolerance mechanisms in a component-based system
Proceedings of the 9th International Workshop on Java Technologies for Real-Time and Embedded Systems
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Abstract: Proposes a control flow checking method that assigns unique initial signatures to each basic block in a program by using the block's start address. Using this strategy, implicit signature checking points are obtained at the beginning of each basic block, which results in a short error detection latency (2-5 instructions). Justifying signatures are embedded at each branch instruction, and a watchdog timer is used to detect the absence of a signature checking point. The method does not require the building of a program flow graph and it handles jumps to destinations that are not fixed at compile/link-time, e.g. subroutine calls using function pointers in the C language. This paper includes a generalized description of the control flow checking method, as well as a description and evaluation of an implementation of the method.