Let caches decay: reducing leakage energy via exploitation of cache generational behavior
ACM Transactions on Computer Systems (TOCS)
Hardware and Software Techniques for Controlling DRAM Power Modes
IEEE Transactions on Computers
Power-aware operating systems for interactive systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Energy-conscious compilation based on voltage scaling
Proceedings of the joint conference on Languages, compilers and tools for embedded systems: software and compilers for embedded systems
An energy saving strategy based on adaptive loop parallelization
Proceedings of the 39th annual Design Automation Conference
Automatic data migration for reducing energy consumption in multi-bank memory systems
Proceedings of the 39th annual Design Automation Conference
An integrated approach to reducing power dissipation in memory hierarchies
CASES '02 Proceedings of the 2002 international conference on Compilers, architecture, and synthesis for embedded systems
Tuning garbage collection for reducing memory system energy in an embedded java environment
ACM Transactions on Embedded Computing Systems (TECS)
Improving memory energy using access pattern classification
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
ECOSystem: managing energy as a first class operating system resource
Proceedings of the 10th international conference on Architectural support for programming languages and operating systems
Energy-performance trade-offs for spatial access methods on memory-resident data
The VLDB Journal — The International Journal on Very Large Data Bases
Application Transformations for Energy and Performance-Aware Device Management
Proceedings of the 2002 International Conference on Parallel Architectures and Compilation Techniques
Enhancing Compiler Techniques for Memory Energy Optimizations
EMSOFT '02 Proceedings of the Second International Conference on Embedded Software
Influence of Loop Optimizations on Energy Consumption of Multi-bank Memory Systems
CC '02 Proceedings of the 11th International Conference on Compiler Construction
Dynamic compilation for energy adaptation
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Compiler-Directed Array Interleaving for Reducing Energy in Multi-Bank Memories
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Exploiting bank locality in multi-bank memories
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
Array Regrouping and Its Use in Compiling Data-Intensive Embedded Applications
IEEE Transactions on Computers
Dynamic cluster reconfiguration for power and performance
Compilers and operating systems for low power
Energy management of virtual memory on diskless devices
Compilers and operating systems for low power
Impact of Data Transformations on Memory Bank Locality
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Access Pattern Restructuring for Memory Energy
IEEE Transactions on Parallel and Distributed Systems
Reducing energy consumption of queries in memory-resident database systems
Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems
Energy management schemes for memory-resident database systems
Proceedings of the thirteenth ACM international conference on Information and knowledge management
Nonuniform Banking for Reducing Memory Energy Consumption
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Optimizing Array-Intensive Applications for On-Chip Multiprocessors
IEEE Transactions on Parallel and Distributed Systems
Software-Directed Disk Power Management for Scientific Applications
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Papers - Volume 01
Integer linear programming based energy optimization for banked DRAMs
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
Compiler-directed high-level energy estimation and optimization
ACM Transactions on Embedded Computing Systems (TECS)
Data Replication in Banked DRAMs for Reducing Energy Consumption
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
Reducing dynamic and leakage energy in VLIW architectures
ACM Transactions on Embedded Computing Systems (TECS)
Reducing energy consumption of multiprocessor SoC architectures by exploiting memory bank locality
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Minimizing energy consumption of banked memories using data recomputation
Proceedings of the 2006 international symposium on Low power electronics and design
Cache miss clustering for banked memory systems
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Currentcy: a unifying abstraction for expressing energy management policies
ATEC '03 Proceedings of the annual conference on USENIX Annual Technical Conference
Design and implementation of power-aware virtual memory
ATEC '03 Proceedings of the annual conference on USENIX Annual Technical Conference
Thermal modeling and management of DRAM memory systems
Proceedings of the 34th annual international symposium on Computer architecture
Proceedings of the conference on Design, automation and test in Europe
Near-Memory Caching for Improved Energy Consumption
IEEE Transactions on Computers
An energy-aware framework for dynamic software management in mobile computing systems
ACM Transactions on Embedded Computing Systems (TECS)
ILP-Based energy minimization techniques for banked memories
ACM Transactions on Design Automation of Electronic Systems (TODAES)
An energy-efficient I/O request mechanism for multi-bank flash-memory storage systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Mini-rank: Adaptive DRAM architecture for improving memory power efficiency
Proceedings of the 41st annual IEEE/ACM International Symposium on Microarchitecture
Decoupled DIMM: building high-bandwidth memory system using low-speed DRAM devices
Proceedings of the 36th annual international symposium on Computer architecture
DRAM power management and energy consumption: a critical assessment
Proceedings of the 22nd Annual Symposium on Integrated Circuits and System Design: Chip on the Dunes
Micro-pages: increasing DRAM efficiency with locality-aware data placement
Proceedings of the fifteenth edition of ASPLOS on Architectural support for programming languages and operating systems
An array allocation scheme for energy reduction in partitioned memory architectures
CC'07 Proceedings of the 16th international conference on Compiler construction
PACS'02 Proceedings of the 2nd international conference on Power-aware computer systems
Energy-efficient server clusters
PACS'02 Proceedings of the 2nd international conference on Power-aware computer systems
Improving off-chip memory energy behavior in a multi-processor, multi-bank environment
LCPC'01 Proceedings of the 14th international conference on Languages and compilers for parallel computing
Rethinking DRAM design and organization for energy-constrained multi-cores
Proceedings of the 37th annual international symposium on Computer architecture
Rank-aware cache replacement and write buffering to improve DRAM energy efficiency
Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
The PowerNap Server Architecture
ACM Transactions on Computer Systems (TOCS)
Elastic Refresh: Techniques to Mitigate Refresh Penalties in High Density Memory
MICRO '43 Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture
Memory power management via dynamic voltage/frequency scaling
Proceedings of the 8th ACM international conference on Autonomic computing
Power management of hybrid DRAM/PRAM-based main memory
Proceedings of the 48th Design Automation Conference
A dynamic energy conservation scheme for clusters in computing centers
ICESS'05 Proceedings of the Second international conference on Embedded Software and Systems
DreamWeaver: architectural support for deep sleep
ASPLOS XVII Proceedings of the seventeenth international conference on Architectural Support for Programming Languages and Operating Systems
The synergy between power-aware memory systems and processor voltage scaling
PACS'03 Proceedings of the Third international conference on Power - Aware Computer Systems
Software–hardware cooperative power management for main memory
PACS'04 Proceedings of the 4th international conference on Power-Aware Computer Systems
Context-independent codes for off-chip interconnects
PACS'04 Proceedings of the 4th international conference on Power-Aware Computer Systems
Energy optimization of a multi-bank main memory
SAMOS'06 Proceedings of the 6th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
System level multi-bank main memory configuration for energy reduction
PATMOS'06 Proceedings of the 16th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
Proceedings of the 49th Annual Design Automation Conference
Towards energy-proportional datacenter memory with mobile DRAM
Proceedings of the 39th Annual International Symposium on Computer Architecture
RAMZzz: rank-aware dram power management with dynamic migrations and demotions
SC '12 Proceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis
A survey of architectural techniques for DRAM power management
International Journal of High Performance Systems Architecture
Rethinking DRAM Power Modes for Energy Proportionality
MICRO-45 Proceedings of the 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture
Conservative row activation to improve memory power efficiency
Proceedings of the 27th international ACM conference on International conference on supercomputing
XDRA: exploration and optimization of last-level cache for energy reduction in DDR DRAMs
Proceedings of the 50th Annual Design Automation Conference
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Abstract: As processor performance increases, there is a corresponding increase in the demands on the memory system, including caches. Research papers have proposed partitioning the cache into instruction/data, temporal/non-temporal, and/or stack/non-stack ...