Coding for system-on-chip networks: a unified framework
Proceedings of the 41st annual Design Automation Conference
An energy-efficient temporal encoding circuit technique for on-chip high performance buses
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
A high-level compact pattern-dependent delay model for high-speed point-to-point interconnects
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Bus encoding schemes for minimizing delay in VLSI interconnects
Proceedings of the 20th annual conference on Integrated circuits and systems design
Data Dependence of Delay Distribution for a Planar Bus
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
A bit-stuffing algorithm for crosstalk avoidance in high speed switching
INFOCOM'10 Proceedings of the 29th conference on Information communications
Coding for system-on-chip networks: a unified framework
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Efficient CODEC designs for crosstalk avoidance codes based on numeral systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Self-calibrated energy-efficient and reliable channels for on-chip interconnection networks
Journal of Electrical and Computer Engineering - Special issue on Networks-on-Chip: Architectures, Design Methodologies, and Case Studies
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