Classification of Defective Analog Integrated Circuits Using Artificial Neural Networks

  • Authors:
  • V. Stopjaková;P. Malošek;D. Mičušík;M. Matej;M. Margala

  • Affiliations:
  • Department of Microelectronics, Slovak University of Technology, Ilkovičova 3, 81219 Bratislava, Slovakia. stopjak@elf.stuba.sk;Department of Microelectronics, Slovak University of Technology, Ilkovičova 3, 81219 Bratislava, Slovakia;ST Microelectronics Design and Application, Pobřežní 3, 180 00 Praha 8, Czech Republic. daniel.micusik@st.com;Department of Microelectronics, Slovak University of Technology, Ilkovičova 3, 81219 Bratislava, Slovakia;Department of Electrical and Computer Engineering, University of Rochester, 419 Computer Studies Building, P.O. Box 270231, Rochester, New York 14627-0231, USA. margala@ece.rochester.edu

  • Venue:
  • Journal of Electronic Testing: Theory and Applications
  • Year:
  • 2004

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Abstract

The paper presents a test stimulus generation and fault simulation methodology for the detection of catastrophic faults in analog circuits. The test methodology chosen for evaluation is RMS AC supply current monitoring. Tests are generated and evaluated ...