Module placement on BSG-structure and IC layout applications
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
The channeled-BSG: a universal floorplan for simultaneous place/route with IC applications
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
An O-tree representation of non-slicing floorplan and its applications
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
A new algorithm for floorplan design
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
B*-Trees: a new representation for non-slicing floorplans
Proceedings of the 37th Annual Design Automation Conference
TCG: a transitive closure graph-based representation for non-slicing floorplans
Proceedings of the 38th annual Design Automation Conference
Corner block list: an effective and efficient topological representation of non-slicing floorplan
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
DAC '82 Proceedings of the 19th Design Automation Conference
An Enhanced Q-Sequence Augmented with Empty-Room-Insertion and Parenthesis Trees
Proceedings of the conference on Design, automation and test in Europe
Large-Scale Circuit Placement: Gap and Promise
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
VLSI module placement based on rectangle-packing by the sequence-pair
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A bijection between permutations and floorplans, and its applications
Discrete Applied Mathematics
Constraint-free analog placement with topological symmetry structure
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Regularity-oriented analog placement with diffusion sharing and well island generation
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Practicality on placement given by optimality of packing
Proceedings of the 2013 ACM international symposium on International symposium on physical design
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The Single-Sequence (simply SS) is a permutation of integers 1, 2, 3,..., n each represents an object placed on a plane without mutual overlapping. An SS represents a system of ABLR-relations (above, below, left-of, right-of) between every pair of integers by SS-to-ABLR rule: if (x,y) is in SS in this order and x or x y, then x is left-of or below y, respectively. If objects are rooms of a T-junction floorplan of n rooms and integers denote their Abe-orders, the ABLR-relations between rooms are coded to an SS by just reading the rooms in a dual way. This paper will enhance the definition and the fact to the case when the floorplan consists of m( ≥ n) rooms and the ABLR-relations are defined on the focused n of these rooms. Coding, i.e. getting the minimum SS from a given floorplan and decoding, i.e. getting the minimum floorplan from a given SS such that focused n rooms satisfy the ABLR-relations defined through the SS-to-ABLR rule are fixed by linear time algorithms. The first application is in a core technique space-planning in physical design of large systems. It is to suggest global routes to insert empty-rooms to relieve spot congestion, critical-path, crosstalk, unroutable nets, etc. without changing the ABLR-relations among the focused rooms.