System level design with spade: an M-JPEG case study
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Viper: A Multiprocessor SOC for Advanced Set-Top Box and Digital TV Systems
IEEE Design & Test
A Heterogeneous Multiprocessor Architecture for Flexible Media Processing
IEEE Design & Test
Workload Characterization Model for Tasks with Variable Execution Demand
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Context-Aware Performance Analysis for Efficient Embedded System Design
Proceedings of the conference on Design, automation and test in Europe - Volume 2
On-chip traffic modeling and synthesis for MPEG-2 video applications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Quantitative Characterization of Event Streams in Analysis of Hard Real-Time Applications
RTAS '04 Proceedings of the 10th IEEE Real-Time and Embedded Technology and Applications Symposium
Rate analysis for streaming applications with on-chip buffer constraints
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Fast and Accurate Multiprocessor Architecture Exploration with Symbolic Programs
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Network calculus: a theory of deterministic queuing systems for the internet
Network calculus: a theory of deterministic queuing systems for the internet
System-level performance analysis for designing on-chip communication architectures
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
SCOPES '07 Proceedingsof the 10th international workshop on Software & compilers for embedded systems
Modelling run-time arbitration by latency-rate servers in dataflow graphs
SCOPES '07 Proceedingsof the 10th international workshop on Software & compilers for embedded systems
Proceedings of the conference on Design, automation and test in Europe
Dataflow models for shared memory access latency analysis
EMSOFT '09 Proceedings of the seventh ACM international conference on Embedded software
Towards multi-application workload modeling in sesame for system-level design space exploration
SAMOS'07 Proceedings of the 7th international conference on Embedded computer systems: architectures, modeling, and simulation
Buffer capacity computation for throughput-constrained modal task graphs
ACM Transactions on Embedded Computing Systems (TECS)
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We present a analytical framework to identify the tradeoffs and performance impacts associated with different SoC platform configurations in the specific context of implementing multimedia applications. "Configurations" in this case might include sizes of different on-chip buffers and scheduling mechanisms (or associated parameters) implemented on the different processing elements of the platform. Identifying such tradeoffs is difficult because of the bursty nature of on-chip traffic arising out of multimedia processing and the high variability in their execution requirements, which result in a highly irregular design space. We show that this irregularity in the design space can be precisely captured using an abstraction called variability characterization curves.