Efficient algorithms for computing the longest viable path in a combinational network
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Timing analysis in precharge/unate networks
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Is redundancy necessary to reduce delay
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Circuit structure relations to redundancy and delay: the KMS algorithm revisited
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Circuit delay models and their exact computation using Timed Boolean Functions
DAC '93 Proceedings of the 30th international Design Automation Conference
Delay fault coverage and performance tradeoffs
DAC '93 Proceedings of the 30th international Design Automation Conference
Exact minimum cycle times for finite state machines
DAC '94 Proceedings of the 31st annual Design Automation Conference
Partial scan delay fault testing of asynchronous circuits
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Valid clocking in wavepipelined circuits
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
| Hi-index | 0.00 |