Examining Smart-Card Security under the Threat of Power Analysis Attacks
IEEE Transactions on Computers
FC '00 Proceedings of the 4th International Conference on Financial Cryptography
Resistance against Differential Power Analysis for Elliptic Curve Cryptosystems
CHES '99 Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems
Energy-aware design techniques for differential power analysis protection
Proceedings of the 40th annual Design Automation Conference
A Logic Level Design Methodology for a Secure DPA Resistant ASIC or FPGA Implementation
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Design of secure cryptography against the threat of power-attacks in DSP-embedded processors
ACM Transactions on Embedded Computing Systems (TECS)
Security as a new dimension in embedded system design
Proceedings of the 41st annual Design Automation Conference
Masking the Energy Behavior of DES Encryption
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Proceedings of the 42nd annual Design Automation Conference
Side-channel leakage of masked CMOS gates
CT-RSA'05 Proceedings of the 2005 international conference on Topics in Cryptology
Multilevel Design Validation in a Secure Embedded System
IEEE Transactions on Computers
Side-channel resistant system-level design flow for public-key cryptography
Proceedings of the 17th ACM Great Lakes symposium on VLSI
Design methods for security and trust
Proceedings of the conference on Design, automation and test in Europe
Proceedings of the 44th annual Design Automation Conference
Information Theoretic Evaluation of Side-Channel Resistant Logic Styles
CHES '07 Proceedings of the 9th international workshop on Cryptographic Hardware and Embedded Systems
Analysis and mitigation of process variation impacts on Power-Attack Tolerance
Proceedings of the 46th Annual Design Automation Conference
Differential power analysis: a serious threat for FPGA security
International Journal of Internet Technology and Secured Transactions
Role of power grid in side channel attack and power-grid-aware secure design
Proceedings of the 50th Annual Design Automation Conference
Journal of Information Security and Applications
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Small, embedded integrated circuits (ICs) such as smart cards are vulnerable to so-called side-channel attacks (SCAs). The attacker can gain information by monitoring the power consumption, execution time, electromagnetic radiation and other information that is leaked by the switching behavior of digital CMOS gates. Ever since power attacks have been introduced in 1999, many countermeasures have been proposed. Often a significant increase in security has been touted. We will show that in order to assess the effectiveness of a countermeasure, a correct simulation model of the side-channel information leaks is vital. We will show that seemingly correct approximations can lead to completely flawed results.