Stand-by power minimization through simultaneous threshold voltage selection and circuit sizing
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Subwavelength lithography and its potential impact on design and EDA
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Design for Variability in DSM Technologies
ISQED '00 Proceedings of the 1st International Symposium on Quality of Electronic Design
Toward a systematic-variation aware timing methodology
Proceedings of the 41st annual Design Automation Conference
Manufacturing-Aware Physical Design
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
TCAD development for lithography resolution enhancement
IBM Journal of Research and Development
Is your layout density verification exact?: a fast exact algorithm for density calculation
Proceedings of the 2007 international symposium on Physical design
Detailed placement for leakage reduction using systematic through-pitch variation
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Manufacturability-Aware Design of Standard Cells
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Proceedings of the 2009 International Conference on Computer-Aided Design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Process variations have become a bottleneck for predictable andhigh-yielding IC design and fabrication. Linewidth variation(∆L) due to defocus in a chip is largely systematic after thelayout is completed, i.e., dense lines "smile" through focus whileisolated (iso) lines "frown". In this paper, we propose a designflow that allows explicit compensation of focus variation, eitherwithin a cell (self-compensated cells) or across cells in acritical path (self-compensated design). Assuming that iso anddense variants are available for each library cell, we achievedesigns that are more robust to focus variation. Design with aself-compensated cell library incurs ~11-12% area penalty whilecompensating for focus variation. Across-cell optimization with amix of dense and iso cell variants incurs ~6-8% area overheadcompared to the original cell library, while meeting timingconstraints across a large range of focus variation (from 0 to0.4um). A combination of original and iso cells provides an evenbetter self-compensating design option, with only 1% area overhead.Circuit delay distributions are tighter with self-compensated cellsand self-compensated design than with a conventional designmethodology.