Self-Compensating Design for Focus Variation

  • Authors:
  • Puneet Gupta;Andrew B. Kahng;Youngmin Kim;Dennis Sylvester

  • Affiliations:
  • Blaze DFM Inc., Sunnyvale, CA;Blaze DFM Inc., Sunnyvale, CA;University of Michigan at Ann Arbor, MI;University of Michigan at Ann Arbor, MI

  • Venue:
  • Proceedings of the 42nd annual Design Automation Conference
  • Year:
  • 2005

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Abstract

Process variations have become a bottleneck for predictable andhigh-yielding IC design and fabrication. Linewidth variation(∆L) due to defocus in a chip is largely systematic after thelayout is completed, i.e., dense lines "smile" through focus whileisolated (iso) lines "frown". In this paper, we propose a designflow that allows explicit compensation of focus variation, eitherwithin a cell (self-compensated cells) or across cells in acritical path (self-compensated design). Assuming that iso anddense variants are available for each library cell, we achievedesigns that are more robust to focus variation. Design with aself-compensated cell library incurs ~11-12% area penalty whilecompensating for focus variation. Across-cell optimization with amix of dense and iso cell variants incurs ~6-8% area overheadcompared to the original cell library, while meeting timingconstraints across a large range of focus variation (from 0 to0.4um). A combination of original and iso cells provides an evenbetter self-compensating design option, with only 1% area overhead.Circuit delay distributions are tighter with self-compensated cellsand self-compensated design than with a conventional designmethodology.