Layout Driven Selection and Chaining of Partial Scan Flip-Flops
Journal of Electronic Testing: Theory and Applications
Improved Large-Step Markov Chain Variants for the Symmetric TSP
Journal of Heuristics
On mismatches between incremental optimizers and instance perturbations in physical design tools
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Local Optimization and the Traveling Salesman Problem
ICALP '90 Proceedings of the 17th International Colloquium on Automata, Languages and Programming
A new approach to scan chain reordering using physical design information
ITC '98 Proceedings of the 1998 IEEE International Test Conference
A layout-based approach for ordering scan chain flip-flops
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Scan insertion criteria for low design impact
VTS '96 Proceedings of the 14th IEEE VLSI Test Symposium
Layout-Aware Scan Chain Synthesis for Improved Path Delay Fault Coverage
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Layout-aware scan chain reorder for launch-off-shift transition test coverage
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Scan-chain design and optimization for three-dimensional integrated circuits
ACM Journal on Emerging Technologies in Computing Systems (JETC)
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Incremental multiple-scan chain ordering for ECO flip-flop insertion
Proceedings of the International Conference on Computer-Aided Design
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Scan chain insertion can have a large impact on routability, wirelength and timing of the design. We present a routing-driven methodology for scan chain ordering with minimum wirelength objective. A routing-based approach to scan chain ordering, while potentially more accurate, can result in TSP (Traveling Salesman Problem) instances which are asymmetric and highly non-metric; this may require a careful choice of solvers. We evaluate our new methodology on recent industry place-and-route blocks with 1200 to 5000 scan cells. We show substantial wirelength reductions for the routing-based flow, versus the traditional placement-based flow: in a number of our test cases, over 86% of scan routing overhead is saved. Even though our experiments are so far timing-oblivious, the routing-based flow does also improve evaluated timing, and practical timing-driven extensions appear feasible.