Introduction to algorithms
Single-layer fanout routing and routability analysis for Ball Grid Arrays
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Efficient breakout routing in printed circuit boards
SCG '97 Proceedings of the thirteenth annual symposium on Computational geometry
Escaping a grid by edge-disjoint paths
SODA '00 Proceedings of the eleventh annual ACM-SIAM symposium on Discrete algorithms
Length-Matching Routing for High-Speed Printed Circuit Boards
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
First- and second-level packaging of the z990 processor cage
IBM Journal of Research and Development
A Two-Layer Bus Routing Algorithm for High-Speed Boards
ICCD '04 Proceedings of the IEEE International Conference on Computer Design
Simultaneous escape routing and layer assignment for dense PCBs
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
A provably good algorithm for high performance bus routing
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
First- and second-level packaging for the IBM eServer z900
IBM Journal of Research and Development
Optimal bus sequencing for escape routing in dense PCBs
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Substrate topological routing for high-density packages
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Effective congestion reduction for IC package substrate routing
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A provably good approximation algorithm for rectangle escape problem with application to PCB routing
Proceedings of the 16th Asia and South Pacific Design Automation Conference
System-in-Package: Electrical and Layout Perspectives
Foundations and Trends in Electronic Design Automation
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Shrinking transistor sizes, increasing circuit complexities, and high clock frequencies bring new board routing challenges that cannot be handled effectively by traditional routing algorithms. Many high-end designs in the industry today require manual routing efforts, which increases the design cycle times considerably. In this paper, we propose an escape routing algorithm to route nets within multiple dense components simultaneously so that the number of crossings in the intermediate area is minimized. We also show how to handle high-speed design constraints within the framework of this algorithm. Experimental comparisons with a recently proposed algorithm (Ozdal and Wong, 2004) show that our algorithm reduces the via requirements of industrial test cases on average by 39%.