IEEE Transactions on Computers
Understanding retiming through maximum average-delay cycles
Proceedings of the 3rd ACM symposium on Parallel algorithms and architectures
Optimal clock skew scheduling tolerant to process variations
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Cycle time and slack optimization for VLSI-chips
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
A Simple Yet Effective Merging Scheme for Prescribed-Skew Clock Routing
ICCD '03 Proceedings of the 21st International Conference on Computer Design
Clock Period Minimization of Non-Zero Clock Skew Circuits
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Multi-Domain Clock Skew Scheduling
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Physical placement driven by sequential timing analysis
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
A fast incremental clock skew scheduling algorithm for slack optimization
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
Dual-Vth leakage reduction with fast clock skew scheduling enhancement
Proceedings of the Conference on Design, Automation and Test in Europe
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In the traditional ASIC flow, clock skew scheduling (CSS), as a method to improve timing, is usually employed during the CTS (clock tree synthesis) step while front-end tools do not take clock skew as a manageable resource. This limits the potential of the subsequent CSS. To overcome such limitations, we design an enhanced CSS algorithm ExtensiveSlackBalance and integrate it into the back-annotation and re-optimization iterations of the current industrial flow. Experiment results show that, the clock frequency can be improved to 26.2% on average compared to 6.4% in the traditional ASIC flow.