Randomized rounding: a technique for provably good algorithms and algorithmic proofs
Combinatorica - Theory of Computing
The maximum concurrent flow problem
Journal of the ACM (JACM)
Faster and Simpler Algorithms for Multicommodity Flow and other Fractional Packing Problems.
FOCS '98 Proceedings of the 39th Annual Symposium on Foundations of Computer Science
Randomized rounding and discrete ham-sandwich theorems: provably good algorithms for routing and packing problems (integer programming)
A Fast Crosstalk- and Performance-Driven Multilevel Routing System
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
UTACO: a unified timing and congestion optimizing algorithm for standard cell global routing
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
A global router with a theoretical bound on the optimal solution
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Global routing by new approximation algorithms for multicommodity flow
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
TROY: track router with yield-driven wire planning
Proceedings of the 44th annual Design Automation Conference
A methodology for fast and accurate yield factor estimation during global routing
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Archer: a history-driven global routing algorithm
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
The coming of age of (academic) global routing
Proceedings of the 2008 international symposium on Physical design
Synergistic physical synthesis for manufacturability and variability in 45nm designs and beyond
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
ELIAD: efficient lithography aware detailed router with compact post-OPC printability prediction
Proceedings of the 45th annual Design Automation Conference
Detailed-routing algorithms for dense pin clusters in integrated circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Archer: a history-based global routing algorithm
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Completing high-quality global routes
Proceedings of the 19th international symposium on Physical design
Algorithms and data structures for fast and good VLSI routing
Proceedings of the 49th Annual Design Automation Conference
BonnRoute: Algorithms and data structures for fast and good VLSI routing
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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We present the first efficient approach to global routing that takes spacing-dependent costs into account and provably finds a near-optimum solution including these costs. We show that this algorithm can be used to optimize manufacturing yield. The core routine is a parallelized fully polynomial approximation scheme, scaling very well with the number of processors. We present results showing that our algorithm reduces the expected number of defects in wiring by more than 10 percent on state-of-the-art industrial chips.