Talisman: fast and accurate multicomputer simulation
Proceedings of the 1995 ACM SIGMETRICS joint international conference on Measurement and modeling of computer systems
Embra: fast and flexible machine simulation
Proceedings of the 1996 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
Using the SimOS machine simulator to study complex computer systems
ACM Transactions on Modeling and Computer Simulation (TOMACS)
Efficient instruction cache simulation and execution profiling with a threaded-code interpreter
Proceedings of the 29th conference on Winter simulation
A virtual machine emulator for performance evaluation
Communications of the ACM
Communications of the ACM
Complete Computer System Simulation: The SimOS Approach
IEEE Parallel & Distributed Technology: Systems & Technology
The Implementation of POSTGRES
IEEE Transactions on Knowledge and Data Engineering
A Design for Efficient Simulation of a Multiprocessor
MASCOTS '93 Proceedings of the International Workshop on Modeling, Analysis, and Simulation On Computer and Telecommunication Systems
MINT: A Front End for Efficient Simulation of Shared-Memory Multiprocessors
MASCOTS '94 Proceedings of the Second International Workshop on Modeling, Analysis, and Simulation On Computer and Telecommunication Systems
Reducing Remote Conflict Misses: NUMA with Remote Cache versus COMA
HPCA '97 Proceedings of the 3rd IEEE Symposium on High-Performance Computer Architecture
A Hybrid Simulation Approach Enabling Performance Characterization of Large Software Systems
MASCOTS '97 Proceedings of the 5th International Workshop on Modeling, Analysis, and Simulation of Computer and Telecommunications Systems
Efficient memory simulation in SimICS
SS '95 Proceedings of the 28th Annual Simulation Symposium
Partial Translation
Using complete machine simulation to understand computer system behavior
Using complete machine simulation to understand computer system behavior
Shade: A Fast Instruction Set Simulator for Execution Profiling
Shade: A Fast Instruction Set Simulator for Execution Profiling
Efficient performance prediction for modern microprocessors
Proceedings of the 2000 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
An analytical model of the working-set sizes in decision-support systems
Proceedings of the 2000 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
Timestamp snooping: an approach for extending SMPs
ACM SIGPLAN Notices
FLASH vs. (simulated) FLASH: closing the simulation loop
ACM SIGPLAN Notices
Facile: a language and compiler for high-performance processor simulators
Proceedings of the ACM SIGPLAN 2001 conference on Programming language design and implementation
Timestamp snooping: an approach for extending SMPs
ASPLOS IX Proceedings of the ninth international conference on Architectural support for programming languages and operating systems
FLASH vs. (Simulated) FLASH: closing the simulation loop
ASPLOS IX Proceedings of the ninth international conference on Architectural support for programming languages and operating systems
LegoSim: simulation of embedded kernels over Pthreads
Journal on Educational Resources in Computing (JERIC)
Implementation aspects of a SPARC V9 complete machine simulator
ACSC '02 Proceedings of the twenty-fifth Australasian conference on Computer science - Volume 4
Measuring Experimental Error in Microprocessor Simulation
ISCA '01 Proceedings of the 28th annual international symposium on Computer architecture
TLB and snoop energy-reduction using virtual caches in low-power chip-multiprocessors
Proceedings of the 2002 international symposium on Low power electronics and design
SIP: Performance Tuning through Source Code Interdependence
Euro-Par '02 Proceedings of the 8th International Euro-Par Conference on Parallel Processing
Solemn: Solaris Emulation Mode for Sparc Sulima
ANSS '04 Proceedings of the 37th annual symposium on Simulation
A case for shared instruction cache on chip multiprocessors running OLTP
MEDEA '03 Proceedings of the 2003 workshop on MEmory performance: DEaling with Applications , systems and architecture
A Cost-Effective Main Memory Organization for Future Servers
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Papers - Volume 01
Catenation and specialization for Tcl virtual machine performance
Proceedings of the 2004 workshop on Interpreters, virtual machines and emulators
Reducing misspeculation overhead for module-level speculative execution
Proceedings of the 2nd conference on Computing frontiers
Fast data-locality profiling of native execution
SIGMETRICS '05 Proceedings of the 2005 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
A Robust Main-Memory Compression Scheme
Proceedings of the 32nd annual international symposium on Computer Architecture
Timing-accurate Storage Emulation
FAST '02 Proceedings of the 1st USENIX Conference on File and Storage Technologies
Proceedings of the 19th annual international conference on Supercomputing
Thread-Shared Software Code Caches
Proceedings of the International Symposium on Code Generation and Optimization
Profiling of parallel processing programs on shared memory multiprocessors using Simics
ACM SIGARCH Computer Architecture News - Special issue on the 2005 workshop on binary instrumentation and application
Chip multithreading systems need a new operating system scheduler
Proceedings of the 11th workshop on ACM SIGOPS European workshop
AVIO: detecting atomicity violations via access interleaving invariants
Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
Journal of Parallel and Distributed Computing
Performance of multithreaded chip multiprocessors and implications for operating system design
ATEC '05 Proceedings of the annual conference on USENIX Annual Technical Conference
QEMU, a fast and portable dynamic translator
ATEC '05 Proceedings of the annual conference on USENIX Annual Technical Conference
A holistic approach to computer system design education based on system simulation techniques
WCAE '98 Proceedings of the 1998 workshop on Computer architecture education
Effective support of simulation in computer architecture instruction
WCAE '02 Proceedings of the 2002 workshop on Computer architecture education: Held in conjunction with the 29th International Symposium on Computer Architecture
Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming
Process-shared and persistent code caches
Proceedings of the fourth ACM SIGPLAN/SIGOPS international conference on Virtual execution environments
Accurate and scalable simulation of network of heterogeneous sensor devices
Journal of Signal Processing Systems - Special Issue: Embedded computing systems for DSP
High Speed CPU Simulation Using LTU Dynamic Binary Translation
HiPEAC '09 Proceedings of the 4th International Conference on High Performance Embedded Architectures and Compilers
Journal of Parallel and Distributed Computing
An evaluation of OpenMP on current and emerging multithreaded/multicore processors
IWOMP'05/IWOMP'06 Proceedings of the 2005 and 2006 international conference on OpenMP shared memory parallel programming
Timing-accurate storage emulation
FAST'02 Proceedings of the 1st USENIX conference on File and storage technologies
A 98 GMACs/W 32-core vector processor in 65nm CMOS
Proceedings of the 17th IEEE/ACM international symposium on Low-power electronics and design
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System level simulators allow computer architects and system software designers to recreate an accurate and complete replica of the program behavior of a target system, regardless of the availability, existence, or instrumentation support of such a system. Applications include evaluation of architectural design alternatives as well as software engineering tasks such as traditional debugging and performance tuning. We present an implementation of a simulator acting as a virtual workstation fully compatible with the sun4m architecture from Sun Microsystems. Built using the system-level SPARC V8 simulator SimICS, SimICS/sun4m models one or more SPARC V8 processors, supports user-developed modules for data cache and instruction cache simulation and execution profiling of all code, and provides a symbolic and performance debugging environment for operating systems. SimICS/sun4m can boot unmodified operating systems, including Linux 2.0.30 and Solaris 2.6, directly from snapshots of disk partitions. To support essentially arbitrary code, we implemented binary-compatible simulators for several devices, including SCSI, console, interrupt, timers, EEPROM, and Ethernet. The Ethernet simulation hooks into the host and allows the virtual workstation to appear on the local network with full services available (NFS, NIS, rsh, etc). Ethernet and console traffic can be recorded for future playback. The performance of SimICS/sun4m is sufficient to run realistic workloads, such as the database benchmark TPC-D, scaling factor 1/100, or an interactive network application such as Mozilla. The slowdown in relation to native hardware is in the range of 25 to 75 (measured using SPECint95). We also demonstrate some applications, including modeling an 8-processor sun4m version (which does not exist), modeling future memory hierarchies, and debugging an operating system.