The Computer from Pascal to Von Neumann
The Computer from Pascal to Von Neumann
Implementation of an Experimental Fault-Tolerant Memory System
IEEE Transactions on Computers
A Highly Efficient Redundancy Scheme: Self-Purging Redundancy
IEEE Transactions on Computers
Computation-Based Reliability Analysis
IEEE Transactions on Computers
A Theory of Diagnosability of Digital Systems
IEEE Transactions on Computers
A Module-Level Testing Approach for Combinational Networks
IEEE Transactions on Computers
Truth-Table Verification of an Iterative Logic Array
IEEE Transactions on Computers
Transition Count Testing of Combinational Logic Circuits
IEEE Transactions on Computers
A Logic System for Fault Test Generation
IEEE Transactions on Computers
A Nine-Valued Circuit Model for Test Generation
IEEE Transactions on Computers
Fail-Safe Asynchronous Machines with Multiple-Input Changes
IEEE Transactions on Computers
A Double Track Error-Correction Code for Magnetic Tape
IEEE Transactions on Computers
Processor Testability and Design Consequences
IEEE Transactions on Computers
Recursion and Testing of Combinational Circuits
IEEE Transactions on Computers
The Error Latency of a Fault in a Sequential Digital Circuit
IEEE Transactions on Computers
About Random Fault Detection of Combinational Networks
IEEE Transactions on Computers
On Monte Carlo Testing of Logic Tree Networks
IEEE Transactions on Computers
Diagnosis of automata failures: a calculus and a method
IBM Journal of Research and Development
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THE field of fault-tolerant computing is concerned with the analysis, design, verification, and diagnosis of computing systems that are subject to faults. A "computing system," in this general context, can be a hardware system, a software system, or a computer which includes both hardware and internal software. A "fault" can reside in either hardware or software and can occur in the process of designing and implementing the system, or in the process of using the system once it is implemented. Major areas of technical interest include: 1) the design and analysis of computers which are able to execute specified algorithms correctly (according to specified correctness criteria) in the presence of hardware and/or software faults; 2) the testing and verification of the initial correctness of hardware and software systems prior to utilization; 3) the design and implementation of on-line fault detection, fault location, and system reconfiguration procedures that can be used to recover from hardware and software faults, to perform system maintenance, and to maintain security; and 4) the development of models, measures, and techniques for evaluating the reliability, availability and, in general, the effectiveness of fault-tolerant computing systems.