Foundations of logic programming; (2nd extended ed.)
Foundations of logic programming; (2nd extended ed.)
Pharmacophore Discovery Using the Inductive Logic Programming System PROGOL
Machine Learning - Special issue on applications of machine learning and the knowledge discovery process
Hole analysis for functional coverage data
Proceedings of the 39th annual Design Automation Conference
Inductive Logic Programming: Techniques and Applications
Inductive Logic Programming: Techniques and Applications
Cost evaluation of coverage directed test generation for the IBM mainframe
Proceedings of the IEEE International Test Conference 2001
Coverage directed test generation for functional verification using bayesian networks
Proceedings of the 40th annual Design Automation Conference
Evolutionary Test Program Induction for Microprocessor Design Verification
ATS '02 Proceedings of the 11th Asian Test Symposium
A Genetic Testing Framework for Digital Integrated Circuits
ICTAI '02 Proceedings of the 14th IEEE International Conference on Tools with Artificial Intelligence
An Introduction to Formal Hardware Verification
An Introduction to Formal Hardware Verification
Ilp: a short look back and a longer look forward
The Journal of Machine Learning Research
Writing Testbenches: Functional Verification of HDL Models, Second Edition
Writing Testbenches: Functional Verification of HDL Models, Second Edition
Automatic Test Program Generation: A Case Study
IEEE Design & Test
StressTest: an automatic approach to test generation via activity monitors
Proceedings of the 42nd annual Design Automation Conference
Enhancing the efficiency of Bayesian network based coverage directed test generation
HLDVT '04 Proceedings of the High-Level Design Validation and Test Workshop, 2004. Ninth IEEE International
Learning microarchitectural behaviors to improve stimuli generation quality
Proceedings of the 48th Design Automation Conference
Coverage-Directed Test Generation Automated by Machine Learning -- A Review
ACM Transactions on Design Automation of Electronic Systems (TODAES)
The global financial markets: an ultra-large-scale systems perspective
Proceedings of the 17th Monterey conference on Large-Scale Complex IT Systems: development, operation and management
Novel test detection to improve simulation efficiency: a commercial experiment
Proceedings of the International Conference on Computer-Aided Design
A novel approach for implementing microarchitectural verification plans in processor designs
HVC'12 Proceedings of the 8th international conference on Hardware and Software: verification and testing
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Increasing the productivity of simulation-based semiconductor design verification is one of the urgent challenges identified in the International Technology Roadmap for Semiconductors. The most difficult aspect is the generation of stimulus for functional coverage closure. This paper introduces a new Coverage-Directed test Generation (CDG) feedback loop which applies Inductive Logic Programming (ILP) to selected tests and coverage data to induce rules that can be used to automatically direct stimulus generation towards outstanding coverage. The case study documented in this paper shows a significant reduction of simulation time when ILP-based CDG is compared to random test generation. This is an exciting and promising new application area for ILP.