Optimal layer assignment for interconnect
Advances in VLSI and Computer Systems
Layer Assignment Problem for Three-Layer Routing
IEEE Transactions on Computers
Constrained via minimization for three-layer routing
Computer-Aided Design
Fast algorithm for optimal layer assignment
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
The constrained via minimization problem for PCB and VLSI design
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Near-optimal n-layer channel routing
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
An optimum layer assignment for routing in ICs and PCBs.
DAC '81 Proceedings of the 18th Design Automation Conference
Wire routing by optimizing channel assignment within large apertures
DAC '71 Proceedings of the 8th Design Automation Workshop
DAC '82 Proceedings of the 19th Design Automation Conference
An efficient approach to multi-layer layer assignment with application to via minimization
DAC '97 Proceedings of the 34th annual Design Automation Conference
A performance-driven layer assignment algorithm for multiple interconnect trees
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
A graph-partitioning-based approach for multi-layer constrained via minimization
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Conjugate conflict continuation graphs for multi-layer constrained via minimization
Information Sciences: an International Journal
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