Generation of correlated random patterns for the complete testing of synthesized multi-level circuits

Authors:
Stephen Pateras;Janusz Rajski
Affiliations:
Department of Electrical Engineering, McGill University, 3480 University Street, Montreal, Canada H3A 2A7;Department of Electrical Engineering, McGill University, 3480 University Street, Montreal, Canada H3A 2A7
Venue:
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Year:
1991

On Evaluating and Optimizing Weights for Weighted Random Pattern Testing

IEEE Transactions on Computers
Deterministic BIST with Multiple Scan Chains

Journal of Electronic Testing: Theory and Applications - Special issue on the IEEE European Test Workshop
Built-in generation of weighted test sequences for synchronous sequential circuits

DATE '00 Proceedings of the conference on Design, automation and test in Europe
Deterministic BIST with multiple scan chains

ITC '98 Proceedings of the 1998 IEEE International Test Conference
Using BIST Control for Pattern Generation

ITC '97 Proceedings of the 1997 IEEE International Test Conference
Scan-BIST based on transition probabilities

Proceedings of the 41st annual Design Automation Conference
On methods to match a test pattern generator to a circuit-under-test

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Random test generation with input cube avoidance

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Hi-index	0.00