Deterministic BIST with Multiple Scan Chains

Authors:
Gundolf Kiefer;Hans-Joachim Wunderlich
Affiliations:
Computer Architecture Lab, Institute of Computer Science, University of Stuttgart, Breitwiesenstr 20/22, 70565 Stuttgart, Germany. Gundolf.Kiefer@informatik.uni-stuttgart.de;Computer Architecture Lab, Institute of Computer Science, University of Stuttgart, Breitwiesenstr 20/22, 70565 Stuttgart, Germany. wu@informatik.uni-stuttgart.de
Venue:
Journal of Electronic Testing: Theory and Applications - Special issue on the IEEE European Test Workshop
Year:
1999

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Abstract

A deterministic BIST scheme for circuits with multiple scanpaths is presented. A procedure is described for synthesizing apattern generator which stimulates all scan chains simultaneously andguarantees complete fault coverage.The new scheme may require lesschip area than a classical LFSR-based approach while better or evencomplete fault coverage is obtained at the same time.