Static Rate-Optimal Scheduling of Iterative Data-Flow Programs Via Optimum Unfolding
IEEE Transactions on Computers
Task Allocation for Maximizing Reliability of Distributed Computer Systems
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The art of parallel programming
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Loop pipelining for scheduling multi-dimensional systems via rotation
DAC '94 Proceedings of the 31st annual Design Automation Conference
Static scheduling for synthesis of DSP algorithms on various models
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IEEE Transactions on Computers
A tool for performance estimation of networked embedded end-systems
DAC '98 Proceedings of the 35th annual Design Automation Conference
ILP-based cost-optimal DSP synthesis with module selection and data format conversion
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Safety and Reliability Driven Task Allocation in Distributed Systems
IEEE Transactions on Parallel and Distributed Systems
Probabilistic Loop Scheduling for Applications with Uncertain Execution Time
IEEE Transactions on Computers
Estimating probabilistic timing performance for real-time embedded systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - System Level Design
Designing and Building Parallel Programs: Concepts and Tools for Parallel Software Engineering
Designing and Building Parallel Programs: Concepts and Tools for Parallel Software Engineering
Embedded System Design: A Unified Hardware/Software Introduction
Embedded System Design: A Unified Hardware/Software Introduction
IEEE Transactions on Parallel and Distributed Systems
High Performance Compilers for Parallel Computing
High Performance Compilers for Parallel Computing
Efficient Scheduling Algorithms for Real-Time Multiprocessor Systems
IEEE Transactions on Parallel and Distributed Systems
Scheduling Data-Flow Graphs via Retiming and Unfolding
IEEE Transactions on Parallel and Distributed Systems
Energy reduction techniques for multimedia applications with tolerance to deadline misses
Proceedings of the 40th annual Design Automation Conference
Exploring the Probabilistic Design Space of Multimedia Systems
RSP '03 Proceedings of the 14th IEEE International Workshop on Rapid System Prototyping (RSP'03)
Probabilistic performance guarantee for real-time tasks with varying computation times
RTAS '95 Proceedings of the Real-Time Technology and Applications Symposium
Loop-List Scheduling for Heterogeneous Functional Units
GLSVLSI '96 Proceedings of the 6th Great Lakes Symposium on VLSI
Scheduling Strategies for Master-Slave Tasking on Heterogeneous Processor Platforms
IEEE Transactions on Parallel and Distributed Systems
Approaching the Maximum Energy Saving on Embedded Systems with Multiple Voltages
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Efficient Assignment and Scheduling for Heterogeneous DSP Systems
IEEE Transactions on Parallel and Distributed Systems
High-level DSP synthesis using concurrent transformations, scheduling, and allocation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
The master-slave paradigm with heterogeneous processors
IEEE Transactions on Parallel and Distributed Systems
ILP optimal scheduling for multi-module memory
CODES+ISSS '09 Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis
On the costs and benefits of stochasticity in stream processing
Proceedings of the 47th Design Automation Conference
Online energy-saving algorithm for sensor networks in dynamic changing environments
Journal of Embedded Computing
Battery-aware task scheduling in distributed mobile systems with lifetime constraint
Proceedings of the 16th Asia and South Pacific Design Automation Conference
Variable assignment and instruction scheduling for processor with multi-module memory
Microprocessors & Microsystems
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Future Generation Computer Systems
Resource allocation robustness in multi-core embedded systems with inaccurate information
Journal of Systems Architecture: the EUROMICRO Journal
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Online optimization for scheduling preemptable tasks on IaaS cloud systems
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Randomized execution algorithms for smart cards to resist power analysis attacks
Journal of Systems Architecture: the EUROMICRO Journal
Three-phase time-aware energy minimization with DVFS and unrolling for Chip Multiprocessors
Journal of Systems Architecture: the EUROMICRO Journal
Thermal-aware task scheduling in 3D chip multiprocessor with real-time constrained workloads
ACM Transactions on Embedded Computing Systems (TECS) - Special issue on embedded systems for interactive multimedia services (ES-IMS)
Energy-aware preemptive scheduling algorithm for sporadic tasks on DVS platform
Microprocessors & Microsystems
Security-aware optimization for ubiquitous computing systems with SEAT graph approach
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SAFE: A Source Deduplication Framework for Efficient Cloud Backup Services
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BER-based Power Scheduling in Wireless Sensor Networks
Journal of Signal Processing Systems
Optimizing Data Placement of Loops for Energy Minimization with Multiple Types of Memories
Journal of Signal Processing Systems
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Journal of Systems Architecture: the EUROMICRO Journal
Loop Transforming for Reducing Data Alignment on Multi-Core SIMD Processors
Journal of Signal Processing Systems
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In high-level synthesis for real-time embedded systems using heterogeneous functional units (FUs), it is critical to select the best FU type for each task. However, some tasks may not have fixed execution times. This article models each varied execution time as a probabilistic random variable and solves heterogeneous assignment with probability (HAP) problem. The solution of the HAP problem assigns a proper FU type to each task such that the total cost is minimized while the timing constraint is satisfied with a guaranteed confidence probability. The solutions to the HAP problem are useful for both hard real-time and soft real-time systems. Optimal algorithms are proposed to find the optimal solutions for the HAP problem when the input is a tree or a simple path. Two other algorithms, one is optimal and the other is near-optimal heuristic, are proposed to solve the general problem. The experiments show that our algorithms can effectively reduce the total cost while satisfying timing constraints with guaranteed confidence probabilities. For example, our algorithms achieve an average reduction of 33.0% on total cost with 0.90 confidence probability satisfying timing constraints compared with the previous work using worst-case scenario.