Benchmark Synthesis Using the LRU Cache Hit Function
IEEE Transactions on Computers
Influence of program transients in computer cache-memories
Influence of program transients in computer cache-memories
The Stack Growth Function: Cache Line Reference Models
IEEE Transactions on Computers
IEEE Transactions on Computers
Evaluating Associativity in CPU Caches
IEEE Transactions on Computers
The art of computer programming, volume 2 (3rd ed.): seminumerical algorithms
The art of computer programming, volume 2 (3rd ed.): seminumerical algorithms
Generation and analysis of very long address traces
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
ACM Computing Surveys (CSUR)
Estimation of the inverse function for random variate generation
Communications of the ACM
Properties of the working-set model
Communications of the ACM
Dynamic space-sharing in computer systems
Communications of the ACM
The working set model for program behavior
Communications of the ACM
Program Behavior: Models and Measurements
Program Behavior: Models and Measurements
A study of program locality and lifetime functions
SOSP '75 Proceedings of the fifth ACM symposium on Operating systems principles
On the foundations of artificial workload design
SIGMETRICS '84 Proceedings of the 1984 ACM SIGMETRICS conference on Measurement and modeling of computer systems
A measure of program locality and its application
SIGMETRICS '84 Proceedings of the 1984 ACM SIGMETRICS conference on Measurement and modeling of computer systems
Expected I-cache miss rates via the gap model
ISCA '94 Proceedings of the 21st annual international symposium on Computer architecture
A Family of Interconnection Networks for Nonuniform Traffic
IEEE Transactions on Parallel and Distributed Systems
Compression-Based Program Characterization for Improving Cache Memory Performance
IEEE Transactions on Computers
An Easy-to-Use Approach for Practical Bus-Based System Design
IEEE Transactions on Computers
The effect of seance communication on multiprocessing systems
ACM Transactions on Computer Systems (TOCS)
Modeling Live and Dead Lines in Cache Memory Systems
IEEE Transactions on Computers
Corrigendum to "Synthetic Traces for Trace-Driven Simulation of Cache Memories"
IEEE Transactions on Computers
Massively Parallel Algorithms for Trace-Driven Cache Simulations
IEEE Transactions on Parallel and Distributed Systems
A Trace-Driven Simulator for Performance Evaluation of Cache-Based Multiprocessor Systems
IEEE Transactions on Parallel and Distributed Systems
Edinet: An Execution Driven Interconnection Network Simulator for DSM Systems
TOOLS '98 Proceedings of the 10th International Conference on Computer Performance Evaluation: Modelling Techniques and Tools
The workload on parallel supercomputers: modeling the characteristics of rigid jobs
Journal of Parallel and Distributed Computing
A heterogeneously segmented cache architecture for a packet forwarding engine
Proceedings of the 19th annual international conference on Supercomputing
Cache miss behavior: is it √2?
Proceedings of the 3rd conference on Computing frontiers
Two-level mapping based cache index selection for packet forwarding engines
Proceedings of the 15th international conference on Parallel architectures and compilation techniques
Accurate memory signatures and synthetic address traces for HPC applications
Proceedings of the 22nd annual international conference on Supercomputing
Performance of large low-associativity caches
ACM SIGMETRICS Performance Evaluation Review
Self-similarity in SPLASH-2 workloads on shared memory multiprocessors systems
EURO-PDP'00 Proceedings of the 8th Euromicro conference on Parallel and distributed processing
PSnAP: accurate synthetic address streams through memory profiles
LCPC'09 Proceedings of the 22nd international conference on Languages and Compilers for Parallel Computing
Responding rapidly to service level violations using virtual appliances
ACM SIGOPS Operating Systems Review
Computer performance analysis and the Pi Theorem
Computer Science - Research and Development
| Hi-index | 14.99 |
Two techniques for producing synthetic address traces that produce good emulations of the locality of reference of real programs are presented. The first algorithm generates synthetic addresses by simulating a random walk in an infinite address-space with references governed by a hyperbolic probability law. The second algorithm is a refinement of the first in which the address space has a given finite size. The basic model for the random walk has two parameters that correspond to the working set size and the locality of reference. By comparing synthetic traces with real traces of identical locality parameters, it is demonstrated that synthetic traces exhibit miss ratios and lifetime functions that compare well with those of the real traces they mimic, both in fully associative and in set-associative memories.