RASSP virtual prototyping of DSP systems
DAC '97 Proceedings of the 34th annual Design Automation Conference
Demystifying 3D ICs: The Pros and Cons of Going Vertical
IEEE Design & Test
Design tools for 3-D integrated circuits
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Scheme for Reducing the Storage Requirements of FFT Twiddle Factors on FPGAs
Journal of VLSI Signal Processing Systems
Through-silicon-via-aware delay and power prediction model for buffered interconnects in 3D ICs
Proceedings of the 12th ACM/IEEE international workshop on System level interconnect prediction
Low-Power Hypercube Divided Memory FFT Engine Using 3D Integration
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Creating 3D specific systems: architecture, design and CAD
Proceedings of the Conference on Design, Automation and Test in Europe
Proceedings of the International Conference on Computer-Aided Design
Impact of nano-scale through-silicon vias on the quality of today and future 3D IC designs
Proceedings of the System Level Interconnect Prediction Workshop
3D-MMC: a modular 3D multi-core architecture with efficient resource pooling
Proceedings of the Conference on Design, Automation and Test in Europe
Distributed TSV topology for 3-D power-supply networks
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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This work discusses a 1024-point, memory-on-logic 3DIC FFT processor for synthetic aperture radar (SAR), sent to fabrication in the 180 nm MIT Lincoln Labs 3D FDSOI 1.5 V process[12] along with the design flow required to realize it with off-the-shelf commercial 2D tools. The work shows how the vertical dimension can be exploited for novel memory architecture tradeoffs that are not feasible in 2D, reducing the energy consumed per memory operation in the FFT by 60.3%. In comparison to its 2D counterpart, the SAR FFT processor exhibits a 53.0% decrease in average wire length, a 24.6% increase in maximum operating frequency and a 25.3% decrease in total silicon area.