Low-Power Hypercube Divided Memory FFT Engine Using 3D Integration

Authors:
Thorlindur Thorolfsson;Samson Melamed;W. Rhett Davis;Paul D. Franzon
Affiliations:
North Carolina State University;North Carolina State University;North Carolina State University;North Carolina State University
Venue:
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Year:
2010

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Abstract

In this article we demonstrate a floating point FFT processor that leverages both 3D integration and a unique hypercube memory division scheme to reduce the power consumption of a 1024 point FFT down to 4.227μJ. The hypercube memory division scheme lowers the energy per memory access by 59.2% and increases the total required area by 16.8%. The use of 3D integration reduces the logic power by 5.2%. We describe the tool flow required to realize the 3D implementation and perform a thermal analysis of it.