Parameter variations and impact on circuits and microarchitecture
Proceedings of the 40th annual Design Automation Conference
Trojan Detection using IC Fingerprinting
SP '07 Proceedings of the 2007 IEEE Symposium on Security and Privacy
Designing and implementing malicious hardware
LEET'08 Proceedings of the 1st Usenix Workshop on Large-Scale Exploits and Emergent Threats
Towards trojan-free trusted ICs: problem analysis and detection scheme
Proceedings of the conference on Design, automation and test in Europe
A region based approach for the identification of hardware Trojans
HST '08 Proceedings of the 2008 IEEE International Workshop on Hardware-Oriented Security and Trust
Hardware Trojan detection using path delay fingerprint
HST '08 Proceedings of the 2008 IEEE International Workshop on Hardware-Oriented Security and Trust
MERO: A Statistical Approach for Hardware Trojan Detection
CHES '09 Proceedings of the 11th International Workshop on Cryptographic Hardware and Embedded Systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IEEE Spectrum
Breakthrough silicon scanning discovers backdoor in military chip
CHES'12 Proceedings of the 14th international conference on Cryptographic Hardware and Embedded Systems
VeriTrust: verification for hardware trust
Proceedings of the 50th Annual Design Automation Conference
Hardware Trojans in wireless cryptographic ICs: silicon demonstration & detection method evaluation
Proceedings of the International Conference on Computer-Aided Design
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Malicious modification of integrated circuits (ICs) in untrusted foundry, referred to as "Hardware Trojan", has emerged as a serious security threat. While side-channel analysis has been reported as an effective approach to detect hardware Trojans, increasing process variations in nanoscale technologies pose a major challenge, since process noise can easily mask the Trojan effect on a measured side-channel parameter, such as supply current. Besides, existing side-channel approaches suffer from reduced Trojan detection sensitivity with increasing design size. In this paper, we propose a novel scalable side-channel approach, named self-referencing, along with associated vector generation algorithm to improve the Hardware Trojan detection sensitivity under large process variations. It compares transient current signature of one region of an IC with that of another, thereby nullifying the effect of process noise by exploiting spatial correlation across regions in terms of process variations. To amplify the Trojan effect on supply current, we propose a region-based vector generation approach, which divides a circuit-undertest (CUT) into several regions and for each region, finds the test vectors which induce maximum activity in that region, while minimizing the activity in other regions. We show that the proposed side-channel approach is scalable with respect to both amount of process variations and design size. The approach is validated with both simulation and measurement results using an FPGA-based test setup for large designs including a 32-bit DLX processor core (∼ 105 transistors). Results shows that our approach can find ultra-small (