Wattch: a framework for architectural-level power analysis and optimizations
Proceedings of the 27th annual international symposium on Computer architecture
A Thermal-Aware Superscalar Microprocessor
ISQED '02 Proceedings of the 3rd International Symposium on Quality Electronic Design
Temperature-aware microarchitecture
Proceedings of the 30th annual international symposium on Computer architecture
Reducing power density through activity migration
Proceedings of the 2003 international symposium on Low power electronics and design
Single-ISA Heterogeneous Multi-Core Architectures for Multithreaded Workload Performance
Proceedings of the 31st annual international symposium on Computer architecture
Dynamic voltage and frequency scaling based on workload decomposition
Proceedings of the 2004 international symposium on Low power electronics and design
Heat-and-run: leveraging SMT and CMP to manage power density through the operating system
ASPLOS XI Proceedings of the 11th international conference on Architectural support for programming languages and operating systems
Aggregating processor free time for energy reduction
CODES+ISSS '05 Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Balancing Resource Utilization to Mitigate Power Density in Processor Pipelines
Proceedings of the 38th annual IEEE/ACM International Symposium on Microarchitecture
Processor Power Reduction Via Single-ISA Heterogeneous Multi-Core Architectures
IEEE Computer Architecture Letters
On-chip thermal gradient analysis and temperature flattening for SoC design
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
MiBench: A free, commercially representative embedded benchmark suite
WWC '01 Proceedings of the Workload Characterization, 2001. WWC-4. 2001 IEEE International Workshop
Techniques for Multicore Thermal Management: Classification and New Exploration
Proceedings of the 33rd annual international symposium on Computer Architecture
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture
Temperature aware task scheduling in MPSoCs
Proceedings of the conference on Design, automation and test in Europe
Thermal-aware task scheduling at the system software level
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
Temperature control of high-performance multi-core platforms using convex optimization
Proceedings of the conference on Design, automation and test in Europe
EMSOFT '08 Proceedings of the 8th ACM international conference on Embedded software
performance/energy optimization of dsp transforms on the XScale processor
HiPEAC'07 Proceedings of the 2nd international conference on High performance embedded architectures and compilers
DTBR: A dynamic thermal-balance routing algorithm for Network-on-Chip
Computers and Electrical Engineering
Queueing model analysis and scheduling strategy for embedded multi-core SoC based on task priority
Computers and Electrical Engineering
A multi-agent framework for thermal aware task migration in many-core systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
TempoMP: integrated prediction and management of temperature in heterogeneous MPSoCs
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Dynamic power management for multidomain system-on-chip platforms: An optimal control approach
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special Section on Networks on Chip: Architecture, Tools, and Methodologies
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Heterogeneous multiprocessor system-on-chips (MPSoCs) which consist of cores with various power and performance characteristics can customize their configuration to achieve higher performance per Watt. On the other hand, inherent imbalance in power densities across MPSoCs leads to non-uniform temperature distributions, which affect performance and reliability adversely. In addition, managing temperature might result in conflicting decisions with achieving higher energy efficiency. In this work, we propose a joint thermal and energy management technique specifically designed for heterogeneous MPSoCs. Our technique identifies the performance demands of the current workload. By utilizing job scheduling and voltage/frequency scaling dynamically, we meet the desired performance while minimizing the energy consumption and the thermal imbalance. In comparison to performance-aware policies such as load balancing, our technique simultaneously reduces the thermal hot spots, temperature gradients, and energy consumption significantly.