Voltage scheduling problem for dynamically variable voltage processors
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Power conscious fixed priority scheduling for hard real-time systems
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Run-time power control scheme using software feedback loop for low-power real-time application
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Low-energy intra-task voltage scheduling using static timing analysis
Proceedings of the 38th annual Design Automation Conference
Computer architecture: a quantitative approach
Computer architecture: a quantitative approach
A scheduling model for reduced CPU energy
FOCS '95 Proceedings of the 36th Annual Symposium on Foundations of Computer Science
Synthesis Techniques for Low-Power Hard Real-Time Systems on Variable Voltage Processors
RTSS '98 Proceedings of the IEEE Real-Time Systems Symposium
Minimum Energy Fixed-Priority Scheduling for Variable Voltage Processor
Proceedings of the conference on Design, automation and test in Europe
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Power reduction techniques for microprocessor systems
ACM Computing Surveys (CSUR)
Energy management for real-time embedded systems with reliability requirements
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Evaluating design tradeoffs in on-chip power management for CMPs
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
Dynamic voltage frequency scaling for multi-tasking systems using online learning
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
Phase-aware adaptive hardware selection for power-efficient scientific computations
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
PICSEL: measuring user-perceived performance to control dynamic frequency scaling
Proceedings of the 13th international conference on Architectural support for programming languages and operating systems
ISCA '08 Proceedings of the 35th Annual International Symposium on Computer Architecture
Static and dynamic temperature-aware scheduling for multiprocessor SoCs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A power aware study for VTDIRECT95 using DVFS
SpringSim '09 Proceedings of the 2009 Spring Simulation Multiconference
Application-driven voltage-island partitioning for low-power system-on-chip design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A spurious-power suppression technique for multimedia/DSP applications
IEEE Transactions on Circuits and Systems Part I: Regular Papers
Proceedings of the Conference on Design, Automation and Test in Europe
Hybrid dynamic energy and thermal management in heterogeneous embedded multiprocessor SoCs
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Adaptive energy-management features of the IBM POWER 7 chip
IBM Journal of Research and Development
OS-level power minimization under tight performance constraints in general purpose systems
Proceedings of the 17th IEEE/ACM international symposium on Low-power electronics and design
Reducing energy usage with memory and computation-aware dynamic frequency scaling
Euro-Par'11 Proceedings of the 17th international conference on Parallel processing - Volume Part I
Identifying the optimal energy-efficient operating points of parallel workloads
Proceedings of the International Conference on Computer-Aided Design
Effective dynamic voltage scaling through CPU-Boundedness detection
PACS'04 Proceedings of the 4th international conference on Power-Aware Computer Systems
Memory performance at reduced CPU clock speeds: an analysis of current x86_64 processors
HotPower'12 Proceedings of the 2012 USENIX conference on Power-Aware Computing and Systems
Evaluation of Low-Power Computing when Operating on Subsets of Multicore Processors
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DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Dynamic frequency scaling on android platforms for energy consumption reduction
Proceedings of the 8th ACM workshop on Performance monitoring and measurement of heterogeneous wireless and wired networks
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This paper presents a technique called "workload decomposition" in which the CPU workload is decomposed in two parts: on-chip and off-chip. The on-chip workload signifies the CPU clock cycles that are required to execute instructions in the CPU whereas the off-chip workload captures the number of external memory access clock cycles that are required to perform external memory transactions. When combined with a dynamic voltage and frequency scaling (DVFS) technique to minimize the energy consumption, this workload decomposition method results in higher energy savings. The workload decomposition itself is performed at run time based on statistics reported by a performance monitoring unit (PMU) without a need for application profiling or compiler support. We have implemented the proposed DVFS with workload decomposition technique on the BitsyX platform, an Intel PXA255-based platform manufactured by ADS Inc., and performed detailed energy measurements. These measurements show that, for a number of widely used software applications, a CPU energy saving of 80% can be achieved for memory-bound programs while satisfying the user-specified timing constraints.