Investigation of transient fault effects in synchronous and asynchronous Network on Chip router

Authors:
Pooria M. Yaghini;Ashkan Eghbal;Hossein Pedram;Hamid Reza Zarandi
Affiliations:
Department of Computer Engineering and Information Technology, Amirkabir University of Technology, Tehran, Iran;Department of Computer Engineering and Information Technology, Amirkabir University of Technology, Tehran, Iran;Department of Computer Engineering and Information Technology, Amirkabir University of Technology, Tehran, Iran;Department of Computer Engineering and Information Technology, Amirkabir University of Technology, Tehran, Iran
Venue:
Journal of Systems Architecture: the EUROMICRO Journal
Year:
2011

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Abstract

This paper presents comparison of transient fault effects in an asynchronous NoC router and a synchronous one. The experiment is based on simulation-based fault injection method to assess the fault-tolerant behavior of both architectures. The effort has been accomplished by employing fault injector signal (FIS) in asynchronous design and synchronous one. Different fault models such as Crosstalk, SEU, and SET have been applied in both architectures to evaluate their robustness. Glitch fault model has also been injected through the asynchronous scheme. The experimental results have been considered in different aspects to estimate the NoC router's robustness. Although asynchronous designs seems inherently fault-tolerant due to applying handshaking signals, up to 55% of the injected faults result in failure, and about 44% of injected faults are replaced by new values before turning into errors. Less than 1% of injected faults treated as latent error. Moreover, the failure rate of token generation is higher than token consumption effects. Furthermore, experiments show that asynchronous NoC router is more robust than the synchronous one by preventing the fault propagation.