Fast evaluation of sequence pair in block placement by longest common subsequence computation
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Wire sizing with scattering effect for nanoscale interconnection
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Layout decomposition for double patterning lithography
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Double patterning layout decomposition for simultaneous conflict and stitch minimization
Proceedings of the 2009 international symposium on Physical design
Post-silicon diagnosis of segments of failing speedpaths due to manufacturing variations
Proceedings of the 47th Design Automation Conference
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Fixed-outline floorplanning: enabling hierarchical design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
VLSI module placement based on rectangle-packing by the sequence-pair
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Dealing with IC manufacturability in extreme scaling
Proceedings of the International Conference on Computer-Aided Design
E-BLOW: e-beam lithography overlapping aware stencil planning for MCC system
Proceedings of the 50th Annual Design Automation Conference
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Electronic Beam Lithography (EBL) is an emerging maskless nanolithography technology which directly writes the desired circuit pattern into wafer using e-beam, thus it overcomes the diffraction limit of light in current optical lithography system. However, low throughput is its key technical hurdle. In conventional EBL system, each rectangle in the layout will be projected by one electronic shot, through a Variable Shaped Beam (VSB). This would be extremely slow. As an improved EBL technology, Character Projection(CP) shoots complex shapes, so called characters, by putting them into a pre-designed stencil to increase throughput. However, only a limited number of characters can be put on the stencil due to its area constraint. For those patterns not in the stencil, they still need to be written by VSB. A key problem is how to select an optimal set of characters and pack them on the CP stencil to minimize total processing time. In this paper, we investigate a new problem of EBL stencil design with overlapped characters. Different from previous works, besides selecting appropriate characters, their placements on the stencil are also optimized in our framework. Our experimental results show that compared to conventional stencil design methodology without overlapped characters, we are able to reduce total projection time by 51%.