Improving System Energy Efficiency with Memory Rank Subsetting
ACM Transactions on Architecture and Code Optimization (TACO)
New memory organizations for 3d DRAM and PCMs
ARCS'12 Proceedings of the 25th international conference on Architecture of Computing Systems
On the correctness of the SIMT execution model of GPUs
ESOP'12 Proceedings of the 21st European conference on Programming Languages and Systems
Brief announcement: speedups for parallel graph triconnectivity
Proceedings of the twenty-fourth annual ACM symposium on Parallelism in algorithms and architectures
Design of low power 3D hybrid memory by non-volatile CBRAM-crossbar with block-level data-retention
Proceedings of the 2012 ACM/IEEE international symposium on Low power electronics and design
iGPU: exception support and speculative execution on GPUs
Proceedings of the 39th Annual International Symposium on Computer Architecture
U2SOD-DB: a database system to manage large-scale ubiquitous urban sensing origin-destination data
Proceedings of the ACM SIGKDD International Workshop on Urban Computing
Predicting memcached throughput using simulation and modeling
Proceedings of the 2012 Symposium on Theory of Modeling and Simulation - DEVS Integrative M&S Symposium
MCEmu: A Framework for Software Development and Performance Analysis of Multicore Systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Dynamic transient fault detection and recovery for embedded processor datapaths
Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
DIMSim: a rapid two-level cache simulation approach for deadline-based MPSoCs
Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
High-performance online spatial and temporal aggregations on multi-core CPUs and many-core GPUs
Proceedings of the fifteenth international workshop on Data warehousing and OLAP
U2STRA: high-performance data management of ubiquitous urban sensing trajectories on GPGPUs
Proceedings of the 2012 ACM workshop on City data management workshop
Proceedings of the Fifth International Workshop on Network on Chip Architectures
CudaGIS: report on the design and realization of a massive data parallel GIS on GPUs
Proceedings of the Third ACM SIGSPATIAL International Workshop on GeoStreaming
ACM Transactions on Architecture and Code Optimization (TACO)
High-performance bidiagonal reduction using tile algorithms on homogeneous multicore architectures
ACM Transactions on Mathematical Software (TOMS)
Proceedings of the 8th ACM European Conference on Computer Systems
Low latency energy efficient communications in global-scale cloud computing systems
Proceedings of the 2013 workshop on Energy efficient high performance parallel and distributed computing
Wire speed name lookup: a GPU-based approach
nsdi'13 Proceedings of the 10th USENIX conference on Networked Systems Design and Implementation
An asymmetric adaptive-precision energy-efficient 3DIC multiplier
Proceedings of the 23rd ACM international conference on Great lakes symposium on VLSI
AVICA: an access-time variation insensitive L1 cache architecture
Proceedings of the Conference on Design, Automation and Test in Europe
Proceedings of the 40th Annual International Symposium on Computer Architecture
Reducing memory access latency with asymmetric DRAM bank organizations
Proceedings of the 40th Annual International Symposium on Computer Architecture
Massively parallel expectation maximization using graphics processing units
Proceedings of the 19th ACM SIGKDD international conference on Knowledge discovery and data mining
A dynamic pipeline for RNA sequencing on multicore processors
Proceedings of the 20th European MPI Users' Group Meeting
Journal of Parallel and Distributed Computing
A shared matrix unit for a chip multi-core processor
Journal of Parallel and Distributed Computing
Towards scalable arithmetic units with graceful degradation
ACM Transactions on Embedded Computing Systems (TECS)
Proceedings of the 4th Asia-Pacific Workshop on Systems
Data filter cache with word selection cache for low power embedded processor
Proceedings of the 2013 Research in Adaptive and Convergent Systems
MMSoC: a multi-layer multi-core storage-on-chip design for systems with high integration
Proceedings of the 14th International Conference on Computer Systems and Technologies
Fine grain thread scheduling on multicore processors: cores with multiple functional units
Proceedings of the 6th ACM India Computing Convention
Automatic OpenCL work-group size selection for multicore CPUs
PACT '13 Proceedings of the 22nd international conference on Parallel architectures and compilation techniques
Evaluation of two formulations of the conjugate gradients method with transactional memory
Euro-Par'13 Proceedings of the 19th international conference on Parallel Processing
Toward application-specific memory reconfiguration for energy efficiency
E2SC '13 Proceedings of the 1st International Workshop on Energy Efficient Supercomputing
A Buffered Dual-Access-Mode Scheme Designed for Low-Power Highly-Associative Caches
International Journal of Embedded and Real-Time Communication Systems
Beyond reuse distance analysis: Dynamic analysis for characterization of data locality potential
ACM Transactions on Architecture and Code Optimization (TACO)
Designing a practical data filter cache to improve both energy efficiency and performance
ACM Transactions on Architecture and Code Optimization (TACO)
How to build a bad research center
Communications of the ACM
Proceedings of the 5th ACM/SPEC international conference on Performance engineering
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The computing world today is in the middle of a revolution: mobile clients and cloud computing have emerged as the dominant paradigms driving programming and hardware innovation today. The Fifth Edition of Computer Architecture focuses on this dramatic shift, exploring the ways in which software and technology in the "cloud" are accessed by cell phones, tablets, laptops, and other mobile computing devices. Each chapter includes two real-world examples, one mobile and one datacenter, to illustrate this revolutionary change. Updated to cover the mobile computing revolutionEmphasizes the two most important topics in architecture today: memory hierarchy and parallelism in all its forms.Develops common themes throughout each chapter: power, performance, cost, dependability, protection, programming models, and emerging trends ("What's Next")Includes three review appendices in the printed text. Additional reference appendices are available online.Includes updated Case Studies and completely new exercises.