Efficient datapath merging for the overhead reduction of run-time reconfigurable systems

Authors:
Mahmood Fazlali;Ali Zakerolhosseini;Georgi Gaydadjiev
Affiliations:
Department of Computer Engineering, Shahid Beheshti University G.C, Teheran, Iran and Computer Engineering Lab., Delft University of Technology, Delft, The Netherlands;Department of Computer Engineering, Shahid Beheshti University G.C, Teheran, Iran;Computer Engineering Lab., Delft University of Technology, Delft, The Netherlands
Venue:
The Journal of Supercomputing
Year:
2012

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Abstract

High latencies in FPGA reconfiguration are known as a major overhead in run-time reconfigurable systems. This overhead can be reduced by merging multiple data flow graphs representing different kernels of the original program into a single (merged) datapath that will be configured less often compared to the separate datapaths scenario. However, the additional hardware introduced by this technique increases the kernels execution time. In this paper, we present a novel datapath merging technique that reduces both the configuration and execution times of kernels mapped on the reconfigurable fabric. Experimental results show up to 13% reduction in the configuration and execution times of kernels from media-bench workloads, compared to previous art on datapath merging. When compared to conventional high-level synthesis algorithms, our proposal reduces kernels configuration and execution times by up to 48%.