Communications of the ACM
Algorithms for synthesis of hazard-free asynchronous circuits
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
CLOVER: a timing constraints verification system
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
A communicating Petri net model for the design of concurrent asynchronous modules
DAC '94 Proceedings of the 31st annual Design Automation Conference
Basic gate implementation of speed-independent circuits
DAC '94 Proceedings of the 31st annual Design Automation Conference
A generalized state assignment theory for transformation on signal transition graphs
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Design of system interface modules
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Automatic gate-level synthesis of speed-independent circuits
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
SHILPA: a high-level synthesis system for self-timed circuits
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Communicating sequential processes
Communications of the ACM
Petri Net Theory and the Modeling of Systems
Petri Net Theory and the Modeling of Systems
Algorithms for Interface Timing Verification
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
SYNTHESIS OF SELF-TIMED VLSI CIRCUITS FROM GRAPH-THEORETIC SPECIFICATIONS
SYNTHESIS OF SELF-TIMED VLSI CIRCUITS FROM GRAPH-THEORETIC SPECIFICATIONS
A new interface specification methodology and its application to transducer synthesis
A new interface specification methodology and its application to transducer synthesis
Design of heterogeneous ICs for mobile and personal communication systems
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
A technique for synthesizing distributed burst-mode circuits
DAC '96 Proceedings of the 33rd annual Design Automation Conference
DAC '96 Proceedings of the 33rd annual Design Automation Conference
An algorithm for synthesis of system-level interface circuits
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
CoWare—a design environment for heterogenous hardware/software systems
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Interface synthesis: a vertical slice from digital logic to software components
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Proceedings of the conference on Design, automation and test in Europe
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Protocol selection and interface generation for HW-SW codesign
Readings in hardware/software co-design
CoWare---a design environment for heterogeneous hardware/software systems
Readings in hardware/software co-design
Synthesis and Optimization of Combinational Interface Circuits
Journal of VLSI Signal Processing Systems
Control Resynthesis for Control-Dominated Asynchronous Designs
ASYNC '96 Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems
Embedded Architecture Co-Synthesis and System Integration
CODES '96 Proceedings of the 4th International Workshop on Hardware/Software Co-Design
Multi-Level Communication Synthesis of Heterogeneous Multilanguage Specification
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
Methods for evaluating and covering the design space during early design development
Integration, the VLSI Journal
A formal method for hardware IP design and integration under I/O and timing constraints
ACM Transactions on Embedded Computing Systems (TECS)
Efficient integration of pipelined IP blocks into automatically compiled datapaths
EURASIP Journal on Embedded Systems
A UML-based approach for heterogeneous IP integration
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
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We describe a new high-level compiler called Integral for designing system interface modules. The input is a high-level concurrent algorithmic specification that can model complex concurrent control flow, logical and arithmetic computations, abstract communication, and low-level behavior. For abstract communication between two communicating modules that obey different I/O protocols, the necessary protocol conversion behaviors are automatically synthesized using a Petri net theoretic approach. We present a synthesis trajectory that can synthesize the necessary hardware resources, control circuitry, and protocol conversion behaviors for implementing system interface modules.