Partition-driven standard cell thermal placement
Proceedings of the 2003 international symposium on Physical design
Timing Minimization by Statistical Timing hMetis-based Partitioning
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
Temperature-aware global placement
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Power density minimization for highly-associative caches in embedded processors
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
Proceedings of the conference on Design, automation and test in Europe: Proceedings
HW-SW emulation framework for temperature-aware design in MPSoCs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Temperature-aware processor frequency assignment for MPSoCs using convex optimization
CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Power-density aware floorplanning for reducing maximum on-chip temperature
MOAS'07 Proceedings of the 18th conference on Proceedings of the 18th IASTED International Conference: modelling and simulation
Power-density aware floorplanning for reducing maximum on-chip temperature
MS '07 The 18th IASTED International Conference on Modelling and Simulation
Hotspots elimination and temperature flattening in VLSI circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Proceedings of the 13th annual conference on Genetic and evolutionary computation
Power profiling-guided floorplanner for thermal optimization in 3D multiprocessor architectures
PATMOS'11 Proceedings of the 21st international conference on Integrated circuit and system design: power and timing modeling, optimization, and simulation
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In this paper, we consider the thermal placement problem for gate arrays. We introduce a new combinatorial optimization problem, matrix synthesis problem (MSP), to model the thermal placement problem. Given a list of mn nonnegative real numbers and an integer t, MSP constructs a m×n matrix out of the given numbers such that the maximum sum among all t×t submatrices is minimized. We show that MSP is NP-complete and present several provably good approximation algorithms for the problem. We also demonstrate that our thermal placement strategy is flexible enough to allow simultaneous consideration of other objectives such as wiring