Biases in the crossover landscape
Proceedings of the third international conference on Genetic algorithms
The turn model for adaptive routing
Journal of the ACM (JACM)
A matrix synthesis approach to thermal placement
Proceedings of the 1997 international symposium on Physical design
The Odd-Even Turn Model for Adaptive Routing
IEEE Transactions on Parallel and Distributed Systems
Evolutionary Algorithms for Solving Multi-Objective Problems
Evolutionary Algorithms for Solving Multi-Objective Problems
A Micro-Genetic Algorithm for Multiobjective Optimization
EMO '01 Proceedings of the First International Conference on Evolutionary Multi-Criterion Optimization
Temperature-aware microarchitecture
Proceedings of the 30th annual international symposium on Computer architecture
Bandwidth-Constrained Mapping of Cores onto NoC Architectures
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Multi-objective mapping for mesh-based NoC architectures
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Thermal-Aware IP Virtualization and Placement for Networks-on-Chip Architecture
ICCD '04 Proceedings of the IEEE International Conference on Computer Design
Energy-aware mapping for tile-based NoC architectures under performance constraints
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
A Multi-Objective Evolutionary Algorithm Based Optimization Model for Network-on-Chip Synthesis
ITNG '07 Proceedings of the International Conference on Information Technology
Cluster-based Simulated Annealing for Mapping Cores onto 2D Mesh Networks on Chip
DDECS '08 Proceedings of the 2008 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems
Outstanding research problems in NoC design: system, microarchitecture, and circuit perspectives
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Information Sciences: an International Journal
ORION 2.0: a fast and accurate NoC power and area model for early-stage design space exploration
Proceedings of the Conference on Design, Automation and Test in Europe
Journal of Systems Architecture: the EUROMICRO Journal
A fast and elitist multiobjective genetic algorithm: NSGA-II
IEEE Transactions on Evolutionary Computation
Energy- and performance-aware mapping for regular NoC architectures
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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This paper addresses the Network-on-Chip (NoC) application mapping problem. This is an NP-hard problem that deals with the optimal topological placement of Intellectual Property cores onto the NoC tiles. Network-on-Chip application mapping Evolutionary Algorithms are developed, evaluated and optimized for minimizing the NoC communication energy. Two crossover and one mutation operators are proposed. It is analyzed how each optimization algorithm performs with every genetic operator, in terms of solution quality and convergence speed. Our proposed operators are compared with state-of-the-art genetic operators for permutation problems. Finally, the problem is approached in a multi-objective way. Besides energy minimization, it is also aimed to map the cores such that a thermally balanced Network-on-Chip design is obtained. It is shown, through simulations on real applications, that by using domain-knowledge, our developed genetic operators increase the algorithms' performance. By comparing these Evolutionary Algorithms with an Optimized Simulated Annealing, it is shown that they perform better. In the case of two contradictory objectives, our genetic operators can still help at providing the mappings with the lowest communication energy.